FDA803U datasheet(44/76 Pages) STMICROELECTRONICS

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Diagnostic

FDA803U

44/76

DS12497 Rev 2

10.7

Output current offset detector

The output current offset detector aim is to detect a current offset on the output.

10.7.1

Output current offset detector operation principle

The device senses the differential DC current flowing through the output pins OUTP and

OUTM. In particular, in reference to Figure 56, the measured current offset is:

IOFFSET = |IOUTP-IOUTM|/2.

Figure 56. Current offset measurement

The measured current offset is then compared with a current threshold, which can be set by

means of I2C bits IB10[4,3]: if it exceeds the chosen threshold, the device communicate that

an output current offset has been detected.

10.7.2

Result communication and I2C control

The output current offset detection consists in one single-shot test. The feature is controlled

through I2C commands.

In order to start the detection, the user must set IB3[3]='1'.

At the end of the test, the internal control logic performs the following operations:



Sets DB0[6]='1' to communicate that the test is ended and the result is valid



Sets DB0[5]='1' if an offset has been detected, or DB0[5]='0' if no offset has been

detected



Sets IB3[3]='0', allowing the user to perform another test afterwards

The detection can be started in MUTE state or in PLAY state. If the user sets IB3[3]='1' while

the device FSM state is different, the test starts as soon as the device FSM enters in MUTE

or PLAY state.

10.7.3

Hot spot detection

The output current offset detector enables the possibility to detect a soft short to Vcc or to

Gnd occurring when the PWM is already turned on, guaranteeing improved robustness

against hot spot formation.

The operation principle is shown in Figure 57:

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