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TDA7808 数据表(PDF) 24 Page - STMicroelectronics |
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TDA7808 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 39 page ![]() I2S and TDM bus interface TDA7808 24/39 DS12230 Rev 4 For TDM mode: WS changes at SCK falling edge, on clock period before the MSB is transmitted WS does not need to be symmetrical. It need to stay high for at least 2 SCK period clock. The maximum duration is: –Th_max = 127 TSCK in TDM 4-channel –Th_max = 255 TSCK in TDM 8-channel and TDM 16 (8+8)-channel The other timings are like in Table 8. 7.5 Group delay The group delay is due to the FIR filter of first interpolator and it is Tdelay = 32/Fs. |
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