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L9788 数据表(PDF) 73 Page - STMicroelectronics |
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L9788 数据表(HTML) 73 Page - STMicroelectronics |
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73 / 264 page ![]() DS12308 Rev 4 73/264 L9788 Multi-voltage regulator supplies 263 VSCB_TH_VS Short to battery threshold -Vpre Vpre +0.2 V VSENSE1/2/3 VUV_VS_l VSENSE1/2/3 undervoltage hysteresis threshold low - 4.5 4.65 4.75 V VSENSE1/2/3 VUV_VS_h VSENSE1/2/3 undervoltage hysteresis threshold high - 4.7 4.8 4.9 V VSENSE1/2/3 VOV_VS VSENSE1/2/3 overvoltage threshold - 5.3 5.4 5.5 V VSENSE1/2/3 PSRRVS Supply voltage tracking rejection f =10 kHz -35 dB VSENSE1/2/3 VOS_VS Over shoot during power up - 5.5 V VSENSE1/2/3 TUV_filter_VS_ running Undervoltage filter time(2) cover by SCAN TEST 16 24 32 µs VSENSE1/2/3 TOV_filter_VS_ running Overvoltage filter time(2) cover by SCAN TEST 16 24 32 µs VSENSE1/2/3 TOC_filter_VS_ running Overcurrent filter time cover by SCAN TEST 16 24 32 µs VSENSE1/2/3 Tmsd_VPRE_H Thermal shutdown_High Comparator threshold and functionality are tested in production 185 200 °C VSENSE1,2,3 Tmsd_VPRE_L Thermal shutdown_Low Comparator threshold and functionality are tested in production 175 190 °C VSENSE1,2,3 Tmsd_hyst Thermal hysteresis for shutdown - 5 10 °C VSENSE1,2,3 tmsd_pre_an Thermal shutdown analog filter time Guaranteed by design 1.5 4 µs VSENSE1,2,3 tmsd_pre_dig Thermal shutdown digital filter time Implemented in VHDL 10 20 30 µs VSENSE1,2,3 1. No oscillation expected with 0mA load current. 2. line and load regulation are guaranteed until the loop is able to regulate after they are defined by low drop parameters; ITH_VS < IMAX_VS which is guaranteed by design; Over shoot during power up should not be triggered over voltage warning. When Vtrk output is higher than VSCB_TH_VS, The Vtrk output structure will be switched off automatically in order to block the big inrush current into chip through Vtrk circuit. When Vtrk output is higher than VOV_VS, an over voltage flag will be set. UV/OV fault detection during power up sequence is masked until RSTN release to avoid false triggering at ramp-up phase. 3. No UV/OV violation is expected during specified transient. 4. Specification valid until Tracking regulator is in regulation range, or, in other words, until Vsense X output voltage is determined by the effect of voltage regulation loop and not by secondary effects on other regulators. Table 31. Tracking sensor supplies electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit Pin |
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