7

Typical application diagram

Figure 7. Typical application diagram - Separated outputs

GND_HS

VH_HS

VDD

MCU

HIN

LIN

VDD

VDD

C

R

C

R

C

R

C

R

GND_PWR

Load_ Phase

HV_BUS

VDD

GND

IN+

IN-

VH

GNDISO

VDD

GND

IN+

IN-

VH

GNDISO

I

S

O

L

A

T

I

O

N

Level

Shifter

Floating

Section

Control

Logic

Floating ground

UVLO

VH

GOFF

Control

Logic

UVLO

VDD

GON

I

S

O

L

A

T

I

O

N

Level

Shifter

Floating

Section

Control

Logic

Floating ground

UVLO

VH

GOFF

Control

Logic

UVLO

VDD

GON

GND_LS

VH_LS

Figure 8. Typical application diagram - Separated outputs and negative gate driving

VDD

MCU

HIN

LIN

VDD

VDD

C

R

C

R

C

R

C

R

GND_PWR

Load_ Phase

HV_BUS

VDD

GND

IN+

IN-

VH

VDD

GND

IN+

IN-

VH

GNDISO

I

S

O

L

A

T

I

O

N

Level

Shifter

Floating

Section

Control

Logic

Floating ground

UVLO

VH

GOFF

Control

Logic

UVLO

VDD

GON

I

S

O

L

A

T

I

O

N

Level

Shifter

Floating

Section

Control

Logic

Floating ground

UVLO

VH

GOFF

Control

Logic

UVLO

VDD

GON

GND_HS

VH_HS

VL_HS

+

VL

VH

+

GNDISO

GND_LS

VH_LS

VL_LS

+

VL

VH

+

STGAP2SICS

Typical application diagram

DS13402 - Rev 4

page 11/22