L99MOD54XP datasheet(7/35 Pages) STMICROELECTRONICS

7 / 35 page

DS12616 Rev 4

7/35

L99MOD54XP

Block diagram and pin description

Figure 2. Configuration diagram (top view)

PowerSSO-36

Table 2. Pin definitions and functions

Symbol

Function

1, 18, 19, 36

GND

Ground:

reference potential.

Important: for the capability of driving the full current at the outputs all pins of

GND must be externally connected.

2, 35

OUT6

High-side driver output 6

The output is built by a high-side switch and is intended for resistive loads, hence

the internal reverse diode from GND to the output is missing. For ESD reason a

diode to GND is present but the energy which can be dissipated is limited. The

high-side driver is a power DMOS transistor with an internal parasitic reverse

diode from the output to VS (bulk-drain-diode). The output is over-current and

open-load protected.

Important: for the capability of driving the full current at the outputs both pins of

OUT6 must be externally connected.

OUT1 OUT2

OUT3

Half-bridge output 1,2,3

The output is built by a high-side and a low-side switch, which are internally

connected. The output stage of both switches is a power DMOS transistor. Each

driver has an internal parasitic reverse diode (bulk-drain-diode: high-side driver

from output to VS, switchs driver from GND to output). This output is over-current

and open-load protected.

6, 7, 14, 25, 28,

Power supply voltage (external reverse protection required)

For this input a ceramic capacitor as close as possible to GND is recommended.

Important: for the capability of driving the full current at the outputs all pins of VS

must be externally connected.

8DI

Serial data input

The input requires CMOS logic levels and receives serial data from the

microcontroller. The data is a 24bit control word and the least significant bit (LSB,

bit 0) is transferred first.

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