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L99MOD54XP 数据表(PDF) 28 Page - STMicroelectronics |
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L99MOD54XP 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 35 page ![]() Functional description of the SPI L99MOD54XP 28/35 DS12616 Rev 4 17 Enable high RDSon OUT5 After 50ms the bit can be cleared. If over-current condition still exists, a wrong load can be assumed. OUT6 – HS open-load The open-load detection monitors the load current in each activated output stage. If the load current is below the open-load detection threshold for at least 1 ms (tdOL) the corresponding open-load bit is set. Due to mechanical/electrical inertia of typical loads a short activation of the outputs (e.g. 3 ms) can be used to test the open-load status without changing the mechanical/electrical state of the loads. 16 x (don’t care) 0 15 x (don’t care) OUT5 – HS open-load 14 OUT3 OC recovery enable OUT4 – HS open-load 13 OUT2 OC recovery enable 0 12 OUT1 OC recovery enable 0 11 OUT6 PWM1 enable If the PWM1/2 enable bit is set and the output is enabled (input register 0) the output is switched on if PWM1/2 input is high and switched off if PWM1/2 input is low. OUT5 is controlled by PWM2 input. All other outputs are controlled by PWM1 input. 0 10 x (don’t care) 0 9 OUT5 PWM2 enable 0 8 OUT4 PWM1 enable 0 7 x (don’t care) 0 6 Enable high RDSon OUT4 OUT3 – HS open-load 5 x (don’t care) OUT3 – LS open-load 4 x (don’t care) OUT2 –HS open-load 3 OUT3 PWM1 enable OUT2– LS open-load 2 OUT2 PWM1 enable OUT1 – HS open-load 1 OUT1 PWM1 enable OUT1 – LS open-load 0 1 No error bit A logical NOR-combination of all bits 1 to 22 in both status registers. Table 19. SPI - input data and status registers 1 (continued) Bit Input register 1 (write) Status register 1 (read) Name Comment Name Comment |
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