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STL8N65M2 数据表(PDF) 3 Page - STMicroelectronics

部件名 STL8N65M2
功能描述  N-channel 650 V, 1 typ., 4 A MDmesh M2 Power MOSFET in a PowerFLAT 5x6 HV package
PDF  15 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STL8N65M2 数据表(HTML) 3 Page - STMicroelectronics

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Electrical characteristics
TC = 25 °C unless otherwise specified
Table 4. On/off-state
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source breakdown
voltage
VGS = 0 V, ID = 1 mA
650
V
IDSS
Zero gate voltage drain
current
VGS = 0 V, VDS = 650 V
1
µA
VGS = 0 V, VDS = 650 V
TC = 125 °C (1)
100
µA
IGSS
Gate-body leakage current
VDS = 0 V, VGS = ±25 V
±10
µA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
2
3
4
V
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 2 A
1
1.25
Ω
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Ciss
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0 V
-
270
-
pF
Coss
Output capacitance
-
14.5
-
pF
Crss
Reverse transfer capacitance
-
0.8
-
pF
Coss eq. (1)
Equivalent capacitance
energy related
VDS = 0 to 520 V, VGS = 0 V
-
108
-
pF
Rg
Intrinsic gate resistance
f = 1 MHz open drain
-
7
-
Ω
Qg
Total gate charge
VDD = 520 V, ID = 5 A
VGS = 0 to 10 V
(see Figure 14. Test circuit for
gate charge behavior )
-
9
-
nC
Qgs
Gate-source charge
-
2.3
-
nC
Qgd
Gate-drain charge
-
4.3
-
nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0
to 80% VDS.
Table 6. Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
VDD = 325 V, ID = 2.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 13. Test circuit for
resistive load switching times
and Figure 18. Switching time
waveform)
-
7.7
-
ns
tr
Rise time
-
20
-
ns
td(off)
Turn-off delay time
-
19.5
-
ns
tf
Fall time
-
30
-
ns
STL8N65M2
Electrical characteristics
DS13016 - Rev 1
page 3/15



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