数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

ICS951402 数据表(PDF) 9 Page - Integrated Circuit Systems

部件名 ICS951402
功能描述  Programmable Timing Control Hub for P4 processor
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS951402 数据表(HTML) 9 Page - Integrated Circuit Systems

Back Button ICS951402 Datasheet HTML 5Page - Integrated Circuit Systems ICS951402 Datasheet HTML 6Page - Integrated Circuit Systems ICS951402 Datasheet HTML 7Page - Integrated Circuit Systems ICS951402 Datasheet HTML 8Page - Integrated Circuit Systems ICS951402 Datasheet HTML 9Page - Integrated Circuit Systems ICS951402 Datasheet HTML 10Page - Integrated Circuit Systems ICS951402 Datasheet HTML 11Page - Integrated Circuit Systems ICS951402 Datasheet HTML 12Page - Integrated Circuit Systems ICS951402 Datasheet HTML 13Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 23 page
background image
9
Integrated
Circuit
Systems, Inc.
ICS951402
Advance Information
0660—05/05/05
I
2C Table: Watchdog Timer Register
Byte 9
Pin #
Name
Control Function Type
0
1
PWD
Bit 7
-
WD7
RW
-
-
0
Bit 6
-
WD6
RW
-
-
0
Bit 5
-
WD5
RW
-
-
0
Bit 4
-
WD4
RW
-
-
1
Bit 3
-
WD3
RW
-
-
0
Bit 2
-
WD2
RW
-
-
0
Bit 1
-
WD1
RW
-
-
0
Bit 0
-
WD0
These bits represent
X*293ms the
watchdog timer will
wait before it goes to
alarm mode. Default
is 16 X 293ms =4.688
seconds
RW
-
-
0
I
2C Table: WD Timer Control Register
Byte 10 Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
M/NEN
M/N Programming
Enable
RW
Latched
Inputs
IIC Prog.
B (11:17)
0
Bit 6
-
WDEN
Watchdog Enable
RW
Disable
Enable
0
Bit 5
-
WDStatus
WD Status Control
RW
OFF
ON
0
Bit 4
-
WD SF4
RW
-
-
1
Bit 3
-
WD SF3
RW
-
-
0
Bit 2
-
WD SF2
RW
-
-
0
Bit 1
-
WD SF1
RW
-
-
0
Bit 0
-
WD SF0
Writing to these bit will
configure the safe
frequency as Byte 0 Bit
(6:0
)
RW
-
-
0
Note: If Byte4 bit1 = 0 then FS4=0
I
2C Table: VCO Frequency Control Register
Byte 11 Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
-
N Div8
N Divider Bit 8
RW
-
-
X
Bit 6
-
M Div6
RW
-
-
X
Bit 5
-
M Div5
RW
-
-
X
Bit 4
-
M Div4
RW
-
-
X
Bit 3
-
M Div3
RW
-
-
X
Bit 2
-
M Div2
RW
-
-
X
Bit 1
-
M Div1
RW
-
-
X
Bit 0
-
M Div0
The decimal
representation of M
Div (6:0) is equal to
reference divider
value. Default at
power up = latch-in
or Byte 0 Rom table.
RW
-
-
X



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com