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PC33975AR2 数据表(PDF) 13 Page - Freescale Semiconductor, Inc |
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PC33975AR2 数据表(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 32 page  Analog Integrated Circuit Device Data Freescale Semiconductor 13 33975 FUNCTIONAL DESCRIPTIONS FUNCTIONAL TERMINAL DESCRIPTION MCU INTERFACE DESCRIPTION The 33975 device directly interfaces to a 3.3 V or 5.0 V microcontroller unit (MCU). SPI serial clock frequencies up to 6.0 MHz may be used for programming and reading switch input status (production tested at 4.16 MHz). Figure 7 illustrates the configuration between an MCU and one 33975. Serial peripheral interface (SPI) data is sent to the 33975 device through the SI input terminal. As data is being clocked into the SI terminal, status information is being clocked out of the device by the SO output terminal. The response to a SPI command will always return the switch status, reset flag, and thermal flag. Input switch states are latched into the SO register on the falling edge of the chip select (CS) terminal. Twenty-four bits are required to complete a transfer of information between the 33975 and the MCU. Figure 7. SPI Interface with Microprocessor Two or more 33975 devices may be used in a module system. Multiple ICs may be SPI-configured in parallel or serial. Figures 8 and 9 show the configurations. When using the serial configuration, 48-clock cycles are required to transfer data in/out of the ICs. Figure 8. SPI Parallel Interface with Microprocessor Figure 9. SPI Serial Interface with Microprocessor 33975 MC68HCXX Microcontroller Receive Buffer Parallel Ports To Logic 24-Bit Shift Register Shift Register MOSI SI MISO SO SCLK CS INT INT Parallel Ports MC68HCXX Microcontroller 33975 33975 SI SCLK CS INT SI SO SCLK CS INT INT SCLK MISO MOSI Shift Register SO Parallel Ports MC68HCXX Microcontroller 33975 33975 SI SCLK CS INT SI SO SCLK CS INT SO INT SCLK MISO MOSI Shift Register |
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