PI7C9X752FAEX datasheet(4/47 Pages) DIODES

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April 2019

Diodes Incorporated

PI7C9X752

Document Number DS40312 Rev 3-2

A product Line of

Diodes Incorporated

PI7C9X752

Pin Description

Pin Name 48-TQFP Pin #

Type

Description

Data Bus Interface

Address data lines [2:0]. These 3 address lines select one of the internal registers in

UART channel A/B during a data bus transaction.

I/O

Data bus lines [7:0] (bidirectional).

IOR# (NC)

When 16/68# pin is HIGH, the Intel bus interface is selected and this input be-

comes read strobe (active low). The falling edge instigates an internal read cycle

and retrieves the data byte from an internal register pointed by the address lines

[A2:A0], puts the data byte on the data bus to allow the host processor to read it on

the rising edge.

When 16/68# pin is LOW, the Motorola bus interface is selected and this input is

not used.

IOW# (R/W#) 15

When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes

write strobe (active low). The falling edge instigates the internal write cycle and the

rising edge transfers the data byte on the data bus to an internal register pointed by

the address lines.

When 16/68# pin is LOW, the Motorola bus interface is selected and this input

becomes read (HIGH) and write (LOW) signal.

CSA#(CS#)

When 16/68# pin is HIGH, this input is chip select A (active low) to enable channel

A in the device.

When 16/68# pin is LOW, this input becomes the chip select (active low) for the

Motorola bus interface.

CSB#(A3)

When 16/68# pin is HIGH, this input is chip select B (active low) to enable channel

B in the device.

When 16/68# pin is LOW, this input becomes address line A3 which is used for

channel selection in the Motorola bus interface. Input logic 0 selects channel A

and logic 1 selects channel B.

INTA (IRQ#) 30

When 16/68# pin is HIGH for Intel bus interface, this output becomes channel

A interrupt output. The output state is defined by the user through the software

setting of MCR[3]. INTA is set to the active mode and OP2A# output LOW when

MCR[3] is set to a logic 1. INTA is set to the three state mode and OP2A# to HIGH

when MCR[3] is set to a logic 0. See MCR[3].

When 16/68# pin is LOW for Motorola bus interface, this output becomes device

interrupt output (active low, open drain). An external pull-up resistor is required

for proper operation.

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