数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

PI7C9X752FAEX 数据表(PDF) 30 Page - Diodes Incorporated

部件名 PI7C9X752FAEX
功能描述  High Performance 1.62V To 3.6V Dual Uart with 64-Byte FIFO
PDF  47 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  DIODES [Diodes Incorporated]
网页  http://www.diodes.com
标志 DIODES - Diodes Incorporated

PI7C9X752FAEX 数据表(HTML) 30 Page - Diodes Incorporated

Back Button PI7C9X752FAEX Datasheet HTML 26Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 27Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 28Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 29Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 30Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 31Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 32Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 33Page - Diodes Incorporated PI7C9X752FAEX Datasheet HTML 34Page - Diodes Incorporated Next Button
Zoom Inzoom in Zoom Outzoom out
 30 / 47 page
background image
30
www.diodes.com
April 2019
Diodes Incorporated
PI7C9X752
Document Number DS40312 Rev 3-2
A product Line of
Diodes Incorporated
PI7C9X752
Note: the default of MSR[7:4]= logic levels of the inputs inverted
Offset 07H(default=FFH)--- Scratch Pad Register (SPR). Accessible when LCR[7]=0 and MCR[6]=0.
Bit
Type
Description
[7:0]
RW
This is 8-bit general purpose register for the user to store temporary data. The content is preserved
during sleep mode.
Offset 00H(default=01H)--- Divisor Latch LSB(DLL). Accessible when LCR[7]=1 and LCR!=0xBF.
Bit
Type
Description
[7:0]
RW
LSB bits of divisor for baud rate generator.
Note: It is reset only when Power-On-Reset.
Offset 01H(default=00H)--- Divisor Latch MSB(DLM). Accessible when LCR[7]=1 and LCR!=0xBF.
Bit
Type
Description
[7:0]
RW
MSB bits of divisor for baud rate generator.
Note: It is reset only when Power-On-Reset.
Offset 02H(default=00H)--- Divisor Fractional Register (DLD). Accessible when EFR[4]=1,LCR[7]=1
Bit
Type
Description
7
RW
When set, enable IrDA (infrared) mode.
6
RW
When set, enable Auto RS-485 half-duplex mode.
[5:4]
RW
Sampling rate select:
00: 16X
01: 8X
1x: 4X
[3:0]
RW
Reserved
1
RO
Delta DSR# input flag
0 = No change on DSR# input
1 = The DSR# input has changed state. A modem status interrupt will be generated if MSR interrupt is
enabled.
0
RO
Delta CTS# input flag
0 = No change on CTS# input
1 = The CTS# input has changed state. A modem status interrupt will be generated if MSR interrupt is
enabled.
Note: Pre_Scaler = 2**(2*MCR[7])
Baud_Rate = XIN / ((256*DLM+DLL)*Pre_Scaler*(16-12*DLD[5])), when DLD[5]=1 or
Baud_Rate = XIN / ((256*DLM+DLL)*Pre_Scaler*(16-8*DLD[4])), when DLD[5]=0 or
Baud_Rate = XIN / ((256*DLM+DLL)*Pre_Scaler*(16-SCR+CPR)), when DLD=8'h00



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com