2

STNRGPF02/12 control architecture

The STNRGPFx2 digital controllers implement a mixed signal (analog/digital) control. The inner current loop is

performed in hardware and the outer voltage loop is performed by a digital PI controller.

The device performs a cascaded control for voltage and current loops to regulate the output voltage by acting on

the total average inductor current.

Figure 3. STNRGPF12 control scheme

Figure 3 shows the control scheme for STNRGPFx2 controllers. As can be seen the difference between output

voltage feedback vout_fb and reference vout_ref is sent to Digital Voltage Control block (PI regulator) which

calculate the peak of input average total current ipk_ref.

The PFC current reference is internally generated and come out from Multiplier block as PWM signal. After

filtering it became the total average sinusoidal input current reference itot_ref for inner current loop (analog

section, red line). The difference between the current reference itot_ref and the input current feedback Itot_fb is

sent to Analog Current compensator PI.

So the master PWM signal is generated by comparing the analog PI output Vctrl and a triangular wave Vtriang at

switching frequency. Finally, an interleaving operation is performed and two PWM signals 180° phase shifted drive

S1 and S2 power switches.

Moreover, the digital section includes an input voltage and load feedforward for fast transient response when main

voltage changes suddenly or a load step current occurs, avoiding large over or under-voltage on output

capacitor C.

STNRGPF02, STNRGPF12

STNRGPF02/12 control architecture

DS12895 - Rev 2

page 5/43