List of figures

Figure 1.

Application schematic ............................................................... 2

Figure 2.

Block diagram .................................................................... 3

Figure 3.

Pin connection (top view) ............................................................. 4

Figure 4.

Oscillator and synchronization ......................................................... 8

Figure 5.

Switching frequency programmability..................................................... 9

Figure 6.

Feed-forward .................................................................... 10

Figure 7.

Soft-start ....................................................................... 11

Figure 8.

OCP and frequency scaling .......................................................... 13

Figure 9.

Current limit and programming resistor .................................................. 14

Figure 10.

Switching regulator control loop simplified model............................................ 17

Figure 11.

Type II compensation network ........................................................ 18

Figure 12.

Type II compensation - Bode plot ...................................................... 19

Figure 13.

Type III compensation network ........................................................ 19

Figure 14.

Type III compensation - Bode plot ...................................................... 21

Figure 15.

A7987 demonstration board schematic .................................................. 23

Figure 16.

Demonstration board layout (top) ...................................................... 24

Figure 17.

Demonstration board layout (bottom).................................................... 24

Figure 18.

Efficiency vs output current VOUT = 3.3 V, FSW = 500 kHz ..................................... 24

Figure 19.

Junction temperature increase vs output current TAMB = 25 °C ................................. 24

Figure 20.

Input quiescent current vs input voltage. No load............................................ 25

Figure 21.

Input shutdown current vs input voltage .................................................. 25

Figure 22.

Load regulation. VOUT = 3.3 V, FSW=500 kHz .............................................. 25

Figure 23.

Line regulation. VOUT = 3.3 V, FSW = 500 kHz.............................................. 25

Figure 24.

Positive buck-boost schematic example .................................................. 26

Figure 25.

Buck-boost PCB layout (top) ......................................................... 27

Figure 26.

Buck-boost PCB layout (bottom) ....................................................... 27

Figure 27.

Negative buck-boost schematic example ................................................. 28

Figure 28.

Negative buck-boost PCB layout (top) ................................................... 28

Figure 29.

Negative buck-boost PCB layout (bottom) ................................................ 28

Figure 30.

HTSSOP16 package outline.......................................................... 29

A7987

List of figures

DS12928 - Rev 3

page 35/36