TDA7720BTR datasheet(23/42 Pages) STMICROELECTRONICS

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TDA7720B

Description of audioprocessor

4.11

Soft-step control

In this device, the soft-step function is available for volume, speaker, loudness, treble,

middle and bass block. With soft-step function, the audible noise of DC offset or the sudden

change of signal can be avoided when adjusting gain setting of the block.

For each block, the soft-step function is controlled by soft-step on/off control bit in the control

table. The soft-step transient time selection (5 ms or 10 ms) is common for all blocks and it

is controlled by soft-step time control bit. The soft-step operation of all blocks has a common

centralized control. In this case, a new soft-step operation will not be started before the

completion of previous soft-step.

There are two different modes to activate the soft-step operation. The soft-step operation

can be started right after I2C data sending, or the soft-step can be activated in parallel after

data sending of several different blocks. The two modes are controlled by the ‘act bit’ (it is

normally bit7 of the byte.) of each byte. When act bit is ‘0’, which means action, the soft-step

is activated right after the date byte is sent. When the act bit is ‘1’, which means wait, the

block goes to wait for soft-step status. In this case, the block will wait for some other block to

activate the operation. The soft-step operation of all blocks in wait status will be done

together with the block which activate the soft-step. With this mode, all specific blocks can

do the soft-step in parallel. This avoids waiting when the soft-step is operated one by one.

Be noticed that if a block is set to ‘gain1’ with act bit =1, later this block is set to ‘gain2’ with

act bit=0, in this case the block will do a soft-step from present gain to ‘gain2’ but not from

present gain to ‘gain1’ then to ‘gain2’.

 Soft-step start here

 Soft-step

start here for all

4.12

DC offset detector

Using the DC offset detection circuit (Figure 18) an offset voltage difference between the

audio power amplifier and the APR's Front and Rear outputs can be detected, preventing

serious damage to the loudspeakers. The circuit compares whether the signal crosses the

zero level inside the audio power at the same time as in the speaker cell. The output of the

zero-window-comparator of the power amplifier must be connected with the WinIn-input of

the APR. The WinIn-input has an 50 k

 internal pull-up resistor connected to 3.3 V. It is

recommended to drive this pin with open-collector outputs only.

To compensate for errors at low frequencies the WinTC-pin are implemented, with external

capacitors introducing the same delay

 = 22.5 k * C

ext as the AC-coupling between the

APR and the power amplifier introduces. For the zero window comparators, the time

constant for spike rejection as well as the threshold are programmable.

See Electrical characteristics on page 9.

Chip Addr

Sub Addr

0xxxxxxx

Chip Addr

Sub Addr

1xxxxxxx

......

0xxxxxxx

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