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TDA7720BTR 数据表(PDF) 24 Page - STMicroelectronics |
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TDA7720BTR 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 42 page  Description of audioprocessor TDA7720B 24/42 DocID024331 Rev 2 A low-active DC-offset error signal appears at the DCErr output if the next conditions are both true: a) Front and rear outputs are inside zero crossing windows. b) The input voltage Vwinin is logic low whenever at least one output of the power amplifier is outside the zero crossing windows. After power-on, the external attached capacitor is rapidly charged (fast-charge) to overcome a false indication. Figure 18. DC offset detection circuit (simplified) 4.13 Output stage The output gain and output DC voltage is configurable by I2C to fit different application. The configuration is as following: AC Gain = 5 dB, DC level = 4 V AC Gain = 8 dB, DC level = 5.75 V |
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