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F5-UPG-SFPC-R-C 数据表(PDF) 2 Page - ATGBICS by Approved Technology |
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F5-UPG-SFPC-R-C 数据表(HTML) 2 Page - ATGBICS by Approved Technology |
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2 / 7 page ![]() ATGBICS® All rights reserved. EOE Ref: ATGBICS_F5-UPG-SFPC-R-C_V1 Page 2 of 7 Product Datasheet SFP to Host Connector Pin Out Pin Signal name Description MSA Notes 1 VEET Transmitter ground (common with receiver ground) 2 TFAULT Transmitter Fault. Not supported Note 1 3 TDIS Transmitter Disable. PHY disabled on high or open Note 2 4 MOD_DEF(2) Module Definition 2. Data line for Serial ID. Note 3 5 MOD_DEF(1) Module Definition 1. Clock line for Serial ID. Note 3 6 MOD_DEF(0) Module Definition 0. Grounded within the module. Note 3 7 Rate Select No connection required 8 LOS Loss of Signal - High Indicates Loss of Signal Note 4 9 VEER Receiver Ground (common with transmitter ground) 10 VEER Receiver Ground (common with transmitter ground) 11 VEER Receiver Ground(common with transmitter ground) 12 RD- Receiver Inverted DATA out. AC Coupled Note 5 13 RD+ Receiver Non-inverted DATA out. AC Coupled Note 5 14 VEER Receiver Ground (common with transmitter ground) 15 VCCR Receiver Power Supply Note 6 16 VCCT Transmitter Power Supply Note 6 17 VEET Transmitter Ground (Common with Receiver Ground) 18 TD+ Transmitter Non-Inverted DATA in. AC Coupled. Note 7 19 TD- Transmitter Inverted DATA in. AC Coupled. Note 7 20 VEET Transmitter Ground (common with receiver ground) Table 1. SFP to host connector pin assignments and descriptions Notes: 1. TX Fault is not used and is always tied to ground through a 100-ohm resistor. 2. TX Disable as described in the MSA is not applicable to the 1000BASE-T module, but is used for convenience as an input to reset the internal ASIC. This pin is pulled up within the module with a 4.7 KW resistor. • Low (0 – 0.8 V): Transceiver on • Between (0.8 V and 2.0 V): Undefined • High (2.0 – 3.465 V): Transceiver in reset state • Open: Transceiver in reset state 3. Mod-Def 0,1,2. These are the module definition pins. They should be pulled up with a 4.7-10 KW resistor on the host board to a supply less than VCCT + 0.3 V or VCCR + 0.3 V. • Mod Def 0 is tied to ground through a 100-ohm resistor to indicate that the module is present. • Mod-Def 1 is clock line of two wire serial interface for optional serial ID • Mod-Def 2 is data line of two wire serial interface for optional serial ID 4. LVTTL compatible with a maximum voltage of 2.5V. Not supported on HTSFP-24-111X |
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