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ICS950402 数据表(PDF) 6 Page - Integrated Circuit Systems

部件名 ICS950402
功能描述  AMD - K8 System Clock Chip
PDF  19 Pages
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制造商  ICST [Integrated Circuit Systems]
网页  http://www.icst.com
标志 ICST - Integrated Circuit Systems

ICS950402 数据表(HTML) 6 Page - Integrated Circuit Systems

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6
ICS950402
0700B—04/30/04
I
2C Table: Functionality and Frequency Control Register
Control
Function
Bit 7
-
Write Disable S/W
Control
RW
Disable
Enable
0
Bit 6
-
SPREAD Enable
RW
Disable
Enable
0
Bit 5
-FS4
RW
0
Bit 4
-FS3
RW
0
Bit 3
-FS2
RW
0
Bit 2
-FS1
RW
0
Bit 1
-FS0
RW
0
Bit 0
-
Write Enable S/W
Control
RW
Disable
Enable
0
I
2C Table: Output Control Register
Control
Function
Bit 7
PCICLK8/HTTCLK1
Output Control
RW
Disable
Enable
1
Bit 6
PCICLK7/HTTCLK0
Output Control
RW
Disable
Enable
1
Bit 5
PCICLK5
Output Control
RW
Disable
Enable
1
Bit 4
PCICLK4
Output Control
RW
Disable
Enable
1
Bit 3
PCICLK3
Output Control
RW
Disable
Enable
1
Bit 2
PCICLK2
Output Control
RW
Disable
Enable
1
Bit 1
PCICLK1
Output Control
RW
Disable
Enable
1
Bit 0
PCICLK0
Output Control
RW
Disable
Enable
1
I
2C Table: Output Control Register
Control
Function
Bit 7
CPUT/C_1
Output Control
RW
Disable
Enable
1
Bit 6
CPUT/C_0
Output Control
RW
Disable
Enable
1
Bit 5
REF2
Output Control
RW
Disable
Enable
1
Bit 4
REF1
Output Control
RW
Disable
Enable
1
Bit 3
REF0
Output Control
RW
Disable
Enable
1
Bit 2
24_48MHz
Output Control
RW
Disable
Enable
1
Bit 1
48MHz
Output Control
RW
Disable
Enable
1
Bit 0
PCICLK9/HTTCLK2
Output Control
RW
Disable
Enable
1
I
2C Table: PCI Free-Run Control Register
Control
Function
Bit 7
PCICLK11
PCI_STOP# Control
RW
Stoppable
Free Run
0
Bit 6
PCICLK10
PCI_STOP# Control
RW
Stoppable
Free Run
0
Bit 5
PCICLK5
PCI_STOP# Control
RW
Stoppable
Free run
0
Bit 4
PCICLK4
PCI_STOP# Control
RW
Stoppable
Free run
0
Bit 3
PCICLK3
PCI_STOP# Control
RW
Stoppable
Free run
0
Bit 2
PCICLK2
PCI_STOP# Control
RW
Stoppable
Free run
0
Bit 1
PCICLK1
PCI_STOP# Control
RW
Stoppable
Free run
0
Bit 0
PCICLK0
PCI_STOP# Control
RW
Stoppable
Free run
0
12
17
14
13
18
11
22
21
31
8
Byte 3
Pin #
1PWD
-
-
Name
Pin #
Byte 0
Type
0
-
-
-
-
-
-
45
21
Pin #
17
Byte 1
14
7
18
1
28
41/40
Byte 2
48
Pin #
PWD
0
6
22
Name
Type
1
Name
PWD
Name
1PWD
0
Type
0
1
13
37/36
Type
See Table1: Frequency
Selection Table



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