PFS7323L datasheet(14/30 Pages) POWERINT

14 / 30 page

Rev. D 06/15

PFS7323-7329

www.power.com

For high performance designs, use of Litz wire is recommended

to reduce copper loss due to skin effect and proximity effect.

For toroidal inductors the numbers of layers should be less than

3 and for bobbin wound inductors, inter layer insulation should

be used to minimize inter layer capacitance. For ferrite core

inductor, a nominal K

P value of 0.35 is recommended for an

optimal design. For Sendust core inductor, a nominal K

P value

of 0.6 is recommended for an optimal design.

Output Capacitor

For a 385 V nominal PFC, use of a electrolytic capacitor with

450 V or higher continuous rating is recommended. The

capacitance required is dependent on the acceptable level of

output ripple and any hold-up time requirements. The equations

below provide an easy way to determine the required capacitance

in order to meet the hold-up time requirement and also to meet

the output ripple requirements. The higher of the two values

would be required to be used.

Capacitance required for meeting the hold-up requirement is

calculated using the equation:

OUTOUT MIN

OUTHOLDUP

PFC output capacitance in F.

PFC output power in watts.

HOLD-UP

Hold-up time specification for the power supply

in seconds.

OUT

Lowest nominal output voltage of the PFC in volts.

OUT(MIN)

Lowest permissible output voltage of the PFC at

the end of hold-up time in volts.

Capacitance required for meeting the low frequency ripple

specification is calculated using the equation:

PFC

OMAX

Input frequency in Hz.

∆V

Peak-peak output voltage ripple in volts.

PFC

PFC operating efficiency.

O(MAX)

Maximum output current in amps.

Capacitance calculated using the above method should be

appropriately increased to account for ageing and tolerances.

Power Supply for the IC

A 12 V regulated supply should be used for the HiperPFS-2. If

the VCC exceeds 15 V, the HiperPFS-2 may be damaged. In

most applications a simple series pass linear regulator made

using an NPN transistor and Zener diode is adequate since the

HiperPFS-2 only requires approximately 3.4 mA maximum for

its operation.

It is recommended that a 3.3

mF or higher, low ESR ceramic

capacitor be used to decouple the VCC supply. This capacitor

should be placed directly at the IC on the circuit board.

Line-Sense Network

The line-sense network connected to the VOLTAGE MONITOR

pin provides input voltage information to the HiperPFS-2. The

value of this resistance sets the brown-in and brown-out

threshold for the part. A value of 4 M

W is recommended for use

with the universal input parts. Only 1% tolerance resistors are

recommended. This resistance value may be modified to adjust

the brown-in threshold if required however change of this value

will affect the maximum power delivered by the part.

A decoupling capacitor of 22 nF is required to be connected

from the VOLTAGE MONITOR pin to the GROUND pin of the

HiperPFS-2 for the universal input parts. This capacitor should

be placed directly at the IC on the circuit board.

Feedback Network

A resistor divider network that provides 6 V at the FEEDBACK

pin at the rated output voltage should be used. The compensation

elements are included with the feedback divider network since

the HiperPFS-2 does not have a separate pin for compensation.

The HiperPFS-2 based PFC has two loops in its feedback. It

has an inner current loop and a low bandwidth outer voltage

loop which ensures high input power factor. The compensation

RC circuit included with the feedback network reduces the

response time of the HiperPFS-2 to fast changes in output

voltage resulting from transient loads.

The recommended circuit and the associated component

values are shown in Figure 15.

Resistors R1 to R4 comprise of the main output voltage divider

network. The sum of resistors R1, R2 and R3 is the upper

divider resistor and the lower feedback resistor is R4. Capacitor

C1 is a soft-finish capacitor that reduces output voltage

overshoot at start-up. Capacitor C

C is to filter any switching

noise from coupling into the COMPENSATION pin. Resistor R7

and capacitor C3 is the loop compensation network which

Figure 15. Recommended Feedback Circuit.

PI-6989-041813

PGT

VCC

B+

CONTROL

HiperPFS-2

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