PFS7525L datasheet(13/36 Pages) POWERINT

13 / 36 page

Rev. A 06/15

PFS7523-7529/7533-7539

www.power.com

Design, Assembly, and Layout Considerations

Power Table

The data sheet power table as shown in Table 2 represents the

maximum practical continuous output power based on the following

conditions:

For the universal input devices (PFS7523L/H – PFS7529H):

1. An input voltage range of 90 VAC to 264 VAC.

2. Overall efficiency of at least 93% at the lowest operating voltage.

3. 385 V nominal output.

4. Sufficient heat sinking to keep device temperature ≤100 ºC.

Operation beyond the limits stated above will require derating.

Operation at elevated temperatures could result in reduced MTBF and

performance degradation, e.g. reduced efficiency, reduced power

limit, PF, and potential of observing hysteretic brown-out, etc., and is

not recommended. Use of a nominal output voltage higher than 395 V

is not recommended for HiperPFS-3 based designs. Operation at

voltages higher than 395 V can result in higher than expected

drain-source voltage during line and load transients.

HiperPFS-3 Selection

Selection of the optimum HiperPFS-3 part depends on required

maximum output power, PFC efficiency and overall system efficiency

(when used with a second stage DC-DC converter), heat sinking

constraints, system requirements and cost goals. The HiperPFS-3

part used in a design can be easily replaced with the next higher or

lower part in the power table to optimize performance, improve

efficiency or for applications where there are thermal design

constraints. Minor adjustments to the inductance value and EMI filter

components may be necessary in some designs when the next higher

or the next lower HiperPFS-3 part is used in an existing design for

performance optimization.

Every HiperPFS-3 family part has an optimal load level where it offers

the most value. Operating frequency of a part will change depending

on load level. Change of frequency will result in change in peak to

peak current ripple in the inductance used. Change in current ripple

will affect input PF and total harmonic distortion of input current.

Input Fuse and Protection Circuit

The input fuse should be rated for a continuous current above the

input current at which the PFC turns-off due to input under- voltage.

This voltage is referred to as the brown-out voltage.

The fuse should also have sufficient I2t rating in order to avoid

nuisance failures during start-up. At start-up a large current is drawn

from the input as the output capacitor charges to the peak of the

applied voltage. The charging current is only limited by any inrush

limiting thermistors, impedance of the EMI filter inductors and the

forward resistance of the input rectifier diodes. A MOV will typically be

required to protect the PFC from line surges. Selection of the MOV

rating will depend on the energy level (EN1000-4-5 Class level) which

the PFC is required to withstand.

A suitable NTC thermistor should be used on the input side to provide

inrush current limiting. Choice of this thermistor should depend on

the inrush current specification for the power supply. NTC thermis-

tors may not be placed in any other location in the circuit as they fail

to limit the stress on the part in the event of line transients and also

fail to limit the inrush current in a predictable manner. The example

in Figure 13 shows the circuit configuration that has the inrush

limiting NTC thermistor on the input side which is bypassed with a

relay after PFC start-up. This arrangement ensures that a consistent

inrush limiting performance is achieved by the circuit.

Input EMI Filter

The variable switching frequency of the HiperPFS-3 effectively

modulates the switching frequency and reduces conducted EMI peaks

associated with the harmonics of the fundamental switching frequency.

This is particularly beneficial for the average detection mode used in

EMI measurements.

The PFC is a switching converter and will need an EMI filter at the

input in order to meet the requirements of most safety agency

standards for conducted and radiated EMI. Typically a common mode

filter with X capacitors connected across the line will provide the

required attenuation of high frequency components of input current

to an acceptable level. The leakage reactance of the common mode

filter inductor and the X capacitors form a low pass filter. In some

designs, additional differential filter inductors may have to be used to

supplement the differential mode inductance of the common-mode

choke.

A filter capacitor with low ESR and high ripple current capability

should be connected at the output of the input bridge rectifier. This

capacitor reduces the generation of the switching frequency compo-

nents of the input current ripple and simplifies EMI filter design.

Typically, 0.33 µF per 100 W should be used for universal input

designs and 0.15 µF per 100 W of output power should be used for

230 VAC only designs.

It is often possible to use a higher value of capacitance after the

bridge rectifier and reduce the X capacitance in the EMI filter.

Regulatory requirements require use of a discharge resistor to be

connected across the input X capacitance on the AC side of the

bridge rectifier. This is to ensure that residual charge is dissipated

after the input voltage is removed when the capacitance is higher

than 0.1 µF. Use of CAPZero integrated circuits from Power Integra-

tions, helps eliminate the steady- state losses associated with the use

of discharge resistors connected permanently across the X capacitors.

Inductor Design

For ferrite inductors the optimal design has K

P of 0.3 to 0.45. (KP is

defined as the current peak-to-peak value divided by the peak value

at minimum AC voltage and 90* phase angle, full load). K

P <0.3

(more continuous) tends towards excessive inductor size, while higher

P >0.45 tends towards excessive winding AC resistance losses due to

large high-frequency AC currents, especially since most ferrite

inductor designs will require >3 winding layers. Flux density at

maximum current limit should be <3900 gauss to prevent core

saturation.

If Sendust core material is used, 90µ or 125µ material is recommended,

because the higher µ materials tend to produce greater inductance at

lower currents, and thus reduced peak- to-peak inductor currents at

lower line phase angles (<45*) which reduces losses and improves PF

at lighter loads and higher input voltages. The design target is for H

at the peak current (low-line, full-load, 90* line phase angle) to be

~60 A-t/cm. Higher H tends towards excessive core loss, and lower

than this increases AC copper losses.

The HiperPFS-3 design spreadsheet simplifies this process and

automatically recommends a core size and design for either ferrite or

Sendust.

For high performance designs, use of Litz wire is recommended to

reduce copper loss due to skin effect and proximity effect. For

toroidal inductors the numbers of layers should be less than 3 and for

bobbin wound inductors, inter layer insulation should be used to

minimize inter layer capacitance.

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