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MPC860DP 数据表(PDF) 43 Page - NXP Semiconductors |
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MPC860DP 数据表(HTML) 43 Page - NXP Semiconductors |
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43 / 77 page ![]() MPC860 PowerQUICC Family Hardware Specifications, Rev. 10 Freescale Semiconductor 43 CPM Electrical Characteristics 11 CPM Electrical Characteristics This section provides the AC and DC electrical specifications for the communications processor module (CPM) of the MPC860. 11.1 PIP/PIO AC Electrical Specifications Table 14 provides the PIP/PIO AC timings as shown in Figure 39 through Figure 43. Figure 39. PIP Rx (Interlock Mode) Timing Diagram Table 14. PIP/PIO Timing Num Characteristic All Frequencies Unit Min Max 21 Data-in setup time to STBI low 0 — ns 22 Data-in hold time to STBI high 2.5 – t31 1 t3 = Specification 23. —CLK 23 STBI pulse width 1.5 — CLK 24 STBO pulse width 1 CLK – 5 ns — ns 25 Data-out setup time to STBO low 2 — CLK 26 Data-out hold time from STBO high 5 — CLK 27 STBI low to STBO low (Rx interlock) — 2 CLK 28 STBI low to STBO high (Tx interlock) 2 — CLK 29 Data-in setup time to clock high 15 — ns 30 Data-in hold time from clock high 7.5 — ns 31 Clock low to data-out valid (CPU writes data, control, or direction) — 25 ns DATA-IN STBI 23 24 22 STBO 27 21 |
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