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KSZ9563RNXC-TR 数据表(PDF) 35 Page - Microchip Technology

部件名 KSZ9563RNXC-TR
功能描述  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

KSZ9563RNXC-TR 数据表(HTML) 35 Page - Microchip Technology

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 2017-2018 Microchip Technology Inc.
DS00002419D-page 35
KSZ9563R
4.4.5
TRAFFIC CONDITIONING & POLICING
4.4.5.1
Weighted Random Early Detection (WRED)
WRED is an optional feature that monitors the average queue size of packet memory and ingress queue size of each
traffic class, and drops packets based on memory and queue utilization. If the buffers are almost empty, all incoming
traffic is accepted. As the buffer utilization increases, the probability for dropping an incoming packet also increases.
When buffer utilization reaches a maximum threshold, the probability has reached 1 and all incoming packets are
dropped.
WRED is intended to avoid the problem of global synchronization. Global synchronization can occur when a switch
becomes congested and begins dropping incoming packets all at once. For TCP streams, packet drops invoke the TCP
congestion control mechanism, which reduce the transmission rate until there are no more packet drops. If there are
many TCP streams and their congestion control mechanisms act in unison, this can cause an undesirable oscillation in
traffic rates. By selectively dropping some packets early rather than waiting until the buffer is full, WRED avoids dropping
large numbers of packets at once and minimizes the chances of global synchronization.
WRED statistically drops more packets from large users than small. Therefore, traffic sources that generate the most
traffic are more likely to be slowed down than traffic sources that generate little traffic.
AVB traffic streams (SR streams) can be exempted from WRED policing.
4.4.6
SPANNING TREE SUPPORT
To support spanning tree, one port is the designated port for the host processor, which is defined as the port for which
tail tagging is enabled. Each of the other ports can be configured in one of the five spanning tree states via “transmit
enable”, “receive enable” and “learning disable” register bits. Table 4-12 shows the setting and software actions taken
for each of the five spanning tree states.
TABLE 4-12:
SPANNING TREE STATES
Disable State
Port Setting
Software Action
The port should not forward
or receive any packets.
Learning is disabled.
transmit enable = 0
receive enable = 0
learning disable = 1
The processor should not send any packets to the
port. The switch may still send specific packets to the
processor (packets that match some entries in the
“Static MAC Table” with “overriding bit” set) and the
processor should discard those packets. Address
learning is disabled on the port in this state.
Blocking State
Port Setting
Software Action
Only packets to the proces-
sor are forwarded.
Learning is disabled.
transmit enable = 0
receive enable = 0
learning disable = 1
The processor should not send any packets to the
port(s) in this state. The processor should program
the “Static MAC Table” with the entries that it needs
to receive (for example, BPDU packets). The “over-
riding” bit should also be set so that the switch will
forward those specific packets to the processor.
Address learning is disabled on the port in this state.
Listening State
Port Setting
Software Action
Only packets to and from the
processor are forwarded.
Learning is disabled.
transmit enable = 0
receive enable = 0
learning disable = 1
The processor should program the “Static MAC
Table” with the entries that it needs to receive (for
example, BPDU packets). The “overriding” bit should
be set so that the switch will forward those specific
packets to the processor. The processor may send
packets to the port(s) in this state. Address learning
is disabled on the port in this state.



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