KSZ9563RNXC-TR datasheet(77/226 Pages) MICROCHIP

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DS00002419D-page 77

KSZ9563R

5.1.4.12

Switch Lookup Engine Control 1 Register

Address:

0x0311

Size:

8 bits

Bits

Description

Type

Default

Unicast Learning Disable

1 = Unicast address learning is disabled

0 = Unicast address learning is enabled

R/W

Self-Address Filtering – Global Enable

The source address of received packets is compared to the MAC address in

registers Switch MAC Address 0 Register through Switch MAC Address 5

Self-address filtering can be enabled on a port-by-port basis by setting the

port enable bit in the Port Control 2 Register in addition to setting this bit.

1 = Enable self-address filtering globally for those ports whose port enable

bit (Port Control 2 Register) is set.

0 = Do not filter self-addressed packets on any port.

R/W

Flush Address Lookup Table

The Flush Option bit in the Switch Lookup Engine Control 2 Register

determines whether flushing is performed on dynamic entries, static entries,

or both.

1 = Trigger a flush of the entire address lookup table. The static address

table is not flushed.

0 = Normal operation

R/W

Flush MSTP Address Entries (Address Lookup Table)

The Flush Option bit in the Switch Lookup Engine Control 2 Register

determines whether flushing is performed on dynamic entries, static entries,

or both.

1 = Trigger a flush of the matched MSTP entries

0 = Normal operation

R/W

Multicast Source Address Filtering

1 = Forward packets with a multicast source address

0 = Drop packets with a multicast source address

R/W

Aging Enable

1 = Enable address table aging

0 = Disable address table aging

R/W

Fast Aging

1 = Enable fast aging

0 = Disable fast aging

R/W

Link Down Flush

1 = Link down will cause the entries of any link down port to be flushed

0 = Link down flush is disabled

R/W

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