LTC4331

20

Rev 0

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APPLICATIONS INFORMATION

PEC transfers are recommended in high noise environ-

ments or high reliability systems.

Table4. Device Address

A1 (Note 1)

A2 (Note 1)

DEVICE ADDR (7-Bit)

L

L

3Eh

Float

L

3Ch

H

L

3Fh

L

Float

3Dh

H

Float

75h

L

H

76h

Float

H

74h

H

H

77h

Float

Float

Internal Slave Device is Disabled

Note 1: For assignments to Float, 0.5 • VL can also be applied to pin.

Register Naming Conventions

RW

Read-Write

RO

Read Only

W0C Write Zero to Clear

CONFIG Register (RW)

FIELD

DESCRIPTION

INTR_MODE

When low, the internal slave interrupt behavior on pin ALERT is SMBALERT. The internal slave device recognizes and responses to

an ARA. When high, the internal slave device ignores the ARA.

CTRL_SEL

When low, the local CTRL pin input is mirrored to the remote CTRL output pin. When high, the value in register CTRL is used instead.

STATUS (RO)

FIELD

DESCRIPTION

NLINK

The level driven by pin LINK. High impedance is interpreted as 1.

NALERT

The level driven by the local side pin ALERT. High impedance is interpreted as 1.

EXT_NALERT

The level driven into the remote ALERT pin. Link must be established.

SPEED_IDX

<0-8>. Encoded index from values set on SPEED1 and SPEED2. See Table2. Link Speed.

Table5. Register Map

REGISTER

NAME

DATA

DEFAULT

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

00h

CONFIG

–

–

–

–

–

–

CTRL_SEL

INTR_MODE

0x00

01h

STATUS

SPEED_IDX

Reserved

EXT_NALERT

NALERT

NLINK

–

02h

EVENT

–

–

–

–

–

FAULT

LINK_LOST

LINK_GOOD

0x00

03h

ALERT_EN

–

–

–

–

–

FAULT_EN

LINK_LOST_EN LINK_GOOD_EN

0x00

04h

FAULT

–

–

–

–

TX_BUF_OVERFLOW EXT_I2C_FAULT LINK_FAULT I2C_WRITE_FAULT

0x00

05h

SCRATCH

SCRATCH

0x08

06h

ADDR_TRANS

–

I2C_TRANS

0x00

07h

CTRL

–

–

–

–

–

–

–

SW_CTRL

0x00