FXPS7115D4S datasheet(21/74 Pages) NXP

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NXP Semiconductors

FXPS7115D4S

Digital absolute pressure sensor, 40 kPa to 115 kPa

Bit field

Definition

C[0], [3:1]

ST[1:0]

Status

RD[15:8]

The contents of the register addressed by RA[7:1] high byte (RA[0] = 1)

RD[7:0]

The contents of the register addressed by RA[7:1] low byte (RA[0] = 0)

CRC[7:0]

8-bit CRC

Table 16. Register read response message bit field descriptions

7.5.3.2 Register write command

The device supports a register write command. The register write command writes the

value specified in RD[7:0] to the register addressed by RA[7:0].

The response to a register write command is shown in Section 7.5.3.2.2 "Register write

response message format". The register write is executed and a response is transmitted

on the next SPI message if and only if all of the following conditions are met:

• No SPI error is detected (see Section 7.5.5.3 "SPI error")

• No MISO error is detected (see Section 7.5.5.4 "SPI data output verification error")

• The ENDINIT bit is cleared.

– This applies to all registers except for the RESET[1:0] bits in the DEVLOCK_WR

• No invalid register request is detected as described below.

If these conditions are met, the register write is executed and the device responds to the

format". Otherwise, no register is written and the device responds with the error response

as defined in Section 7.5.2 "SPI response format". The register is not written until the

transfer during which the register write was requested has been completed.

A register write command to a read-only register is not executable, but results in a valid

response.

7.5.3.2.1 Register write command message format

MSB: bit 31; LSB: bit 0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

15 14 13 12 11 10 9

Command

C[3:0]

Fixed bits:

must = 0h

8-bit CRC

RA[7:1]

RA[0]

RD[7:0]

CRC[7:0]

Table 17. Register write command message format

Bit field

Definition

C[3:0]

RA[7:0]

RA[7:1] contains the byte address of the register to be written

RD[7:0]

RD[7:0] contains the data byte to be written to address RA[7:0]

CRC[7:0]

8-bit CRC

Table 18. Register write command message bit field descriptions

FXPS7115D4S

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 9 August 2022

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