FXPS7115D4S datasheet(39/74 Pages) NXP

39 / 74 page

NXP Semiconductors

FXPS7115D4S

Digital absolute pressure sensor, 40 kPa to 115 kPa

Notes:

• The user must take care to ensure that the desired registers are addressed. For

example, if the REGION_LOAD bits are set to Ah and the user executes a read

of address C2h, the contents of registers A2h is transmitted. No error detection is

included other than a read of the REGION_ACTIVE bits.

• In SPI and I2C modes, once the ENDINIT bit is set, writes to registers other than the

RESET[1:0] bits are inhibited. For this reason, reads of the UF0, UF1, and F registers

are only possible for the region selected by the REGION_ACTIVE bits at the time

ENDINIT is set.

7.7.7 SOURCEID_x - source identification registers (address 1Ah, 1Bh)

The source identification registers are user programmed read/write registers that contain

the source identification information used in SPI Mode. These registers are included in

the read/write array error detection.

Bit

Symbol

SID0_EN

reserved

SOURCEID_0[3:0]

Factory default

Access

R/W

Table 55. SOURCEID_0 - source identification register (address 1Ah) bit allocation

Bit

Symbol

SID1_EN

reserved

SOURCEID_1[3:0]

Factory default

Access

R/W

Table 56. SOURCEID_1 - source identification register (address 1Bh) bit allocation

7.7.7.1 Data source enable bits (SIDx_EN)

The SIDx_EN are control bits for both I2C and SPI modes. In I2C mode, they configure

the automatic register read wrap-around feature to optimize the number of I2C

transactions. See Section 7.4.6.3 and Table 9 for details.

In SPI mode, the SIDx_EN bits enable and map the data source (SNSDATA0,

SNSDATA1) to the associated source identification as described in Table 11. Additionally,

the SPI error response monitoring can be mapped to the SOURCEID_x channels. SPI

error responses are detailed in Section 7.5.4 "Error checking".

Source ID

Source ID Enable (SIDx_EN) Transmitted data

SPI error response

SOURCEID_0

SNSDATA0

SPI error response

SOURCEID_1

SNSDATA1

Table 57. Source ID enable

In I2C mode, the SOURCEID_x registers are readable and writable but have no effect on

the device. See Table 11, for details regarding the effect of the SIDx_EN bits.

FXPS7115D4S

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 9 August 2022

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