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M68AW511A 数据表(PDF) 16 Page - STMicroelectronics

部件名 M68AW511A
功能描述  4 Mbit (512K x8) 3.0V Asynchronous SRAM
PDF  21 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M68AW511A 数据表(HTML) 16 Page - STMicroelectronics

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Figure 12. Low VCC Data Retention AC Waveforms
Table 9. Low VCC Data Retention Characteristics
Note: 1. All other Inputs at VIH ≥ VCC –0.2V or VIL ≤0.2V.
2. Tested initially and after any design or process may affect these parameters. tAVAV is Read cycle time.
3. No input may exceed VCC +0.2V.
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
ICCDR
(1)
Supply Current (Data Retention)
VCC = 1.5V, E ≥ VCC – 0.2V, f = 0
(3)
4.5
9
µA
tCDR
(1,2)
Chip Disable to Power Down
0
ns
tR
(2)
Operation Recovery Time
tAVAV
ns
VDR
(1)
Supply Voltage (Data Retention)
E
≥ VCC – 0.2V, f = 0
1.5
V
AI05447
DATA RETENTION MODE
tR
3.6V
tCDR
VCC
2.7V
VDR > 1.5V
E
E
≥ VDR – 0.2V



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