REV. 0

AD6645

–6–

PIN CONFIGURATION

52 51 50 49 48

43 42 41 40

47 46 45 44

14 15 16 17 18 19 20 21 22 23 24 25 26

1

2

3

4

5

6

7

8

9

10

11

13

12

PIN 1

IDENTIFIER

TOP VIEW

(Not to Scale)

39

38

37

36

35

34

33

32

31

30

29

28

27

AD6645

GND

VREF

GND

ENC

ENC

GND

GND

AIN

AIN

GND

D3

D2

D1

D0 (LSB)

DMID

GND

OVR

DNC

GND

GND

DNC = DO NOT CONNECT

PIN FUNCTION DESCRIPTIONS

Pin No.

Mnemonic

Function

1, 33, 43

3.3 V Power Supply (Digital) Output Stage Only

2, 4, 7, 10, 13,

GND

Ground

15, 17, 19, 21,

23, 25, 27, 29,

34, 42

3

VREF

2.4 V Reference. Bypass to ground with a 0.1

mF microwave chip capacitor.

5

ENC

Encode Input. Conversion initiated on rising edge.

6

ENC

Complement of ENC, Differential Input

8, 9, 14, 16, 18,

5 V Analog Power Supply

22, 26, 28, 30

11

AIN

Analog Input

12

AIN

Complement of AIN, Differential Analog Input

20

C1

Internal Voltage Reference. Bypass to ground with a 0.1

mF chip capacitor.

24

C2

Internal Voltage Reference. Bypass to ground with a 0.1

mF chip capacitor.

31

DNC

Do not connect this pin.

32

OVR

*

Over-Range Bit. A logic-level high indicates analog input exceeds

±FS.

35

DMID

36

D0 (LSB)

Digital Output Bit (Least Significant Bit); Two’s Complement

37–41, 44–50

D1–D5, D6–D12

Digital Output Bits in Two’s Complement

51

D13 (MSB)

Digital Output Bit (Most Significant Bit); Two’s Complement

52

DRY

DataReady Output

*The functionality of the Over-Range bit is specified for a temperature range of 25

∞C to 85∞C only.