74HC4040 datasheet(6/24 Pages) PHILIPS

6 / 24 page

74HC_HCT4040_3

Product data sheet

Rev. 03 — 14 September 2005

6 of 24

Philips Semiconductors

74HC4040; 74HCT4040

12-stage binary ripple counter

8.2 Timing diagram

Limiting values

[1]

For DIP16 packages: above 70

°C, P

tot derates linearly with 12 mW/K.

For SO16, SSOP16, TSSOP16 and DHVQFN16 packages, above 70

°C, Ptot derates linearly with 8 mW/K.

Fig 7.

Timing diagram

001aad587

128

256

512 1024 2048 4096

CP input

MR input

Q10

Q11

Table 5:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max

Unit

VCC

supply voltage

−0.5

IIK

input diode current

VI < −0.5 V or VI > VCC + 0.5 V

±20

IOK

output diode current

VI < −0.5 V or VI > VCC + 0.5 V

±20

output source or sink current

−0.5 V < VO < VCC + 0.5 V

±25

ICC

quiescent supply current

±50

IGND

ground current

±50

Tstg

storage temperature

−65

+150

°C

Ptot

power dissipation

Tamb = −40 °C to +125 °C

[1]

DIP16 package

750

SO16, SSOP16, TSSOP16 and

DHVQFN16 packages

500

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