AN1484 - APPLICATION NOTE

2/11

1.1.3 Burst Mode

The VIPer12A integrates a current mode PWM

with a Power MOSFET and includes the leading

edge blanking function. The burst mode is a

feature which allows VIPer12A to reduce its

average switching frequency when the energy

drained

by

the

output

load

goes

below

E=(tb*Vin)2*fsw/2Lp (tb Blanking time, Vin DC

input voltage, fsw Switching frequency, Lp Primary

Inductance). This is obtained with a small ripple

current around shut down current of feedback pin

and maintaining the Vdd voltage above 9V. If Vdd

goes below 9V there is the “bad burst mode” in

which

VIPer12A

repeats

the

restart

cycle

continuously, with a worst standby consumption

and a higher secondary ripple voltage.

1.1.4 Compensation and Duty cycle control

The internal structure of VIPer12A feedback and

compensation pin (FB pin 3) is shown in Figure 1.

The current injected on the FB pin is added to the

one coming from the SenseFet in R2 and then

compared to an internal 0.23V Vref. When FB

voltage is closed to ground, the VIPer12A delivers

its full power. On the other side, when FB voltage

is above 0.23*(R1+R2)/R2, the VIPer12A stops

switching.

The FB pin is directly driven by the emitter of the

optocoupler, behaving as a current source. This

current is filtered by a small 47nF capacitor C5 to

guarantee cycle to cycle stability.

Important: It is necessary to keep C5 very close to

the VIPer12A feedback pin to avoid high frequency

instability on the compensation loop.

1.1.5 Primary drive

In a flyback power supply, the transformer is used

as an energy tank fuelled during the ON time of the

Mosfet. When the Mosfet turns off, its drain voltage

rises from low value to the Input Voltage +

Reflected Voltage when the secondary diode

conducts,

regaining

on

the

secondary

the

magnetic energy stored in the transformer. As

primary and secondary windings are not perfectly

magnetically coupled, there is a serial leakage

inductance that behaves like an open inductor

charged at Ipeak that makes the Mosfet drain

voltage reach higher values.

If the peak voltage is higher than the Vdss of the

VIPer12A Mosfet, the device will be destroyed. So

the drain voltage must be kept below its avalanche

voltage of 730V.

Commonly a clamper based on a RCD network or

a diode with a transil to clamp the rise of the drain

voltage is used.

The presence

of the

clamper

is an extra

consumption in standby mode, especially with

RCD clamper respect to the transil clamper.

Because the power consumption is manageable

with transil clamper, this solution has been chosen

here.

Figure 1: VIPer12A Internal Structure

1.2 Secondary Regulation

1.2.1 Voltage Regulation

The Voltage regulation is achieved with a zener

diode D6 directly driving the optocoupler. The

resistor R3 limits the current in both the zener and

the opto in case of overvoltage.

The VIPer12A feedback pin is current controlled

and its requirement goes from few uA at full load to

1mA in standby. The same current change is

experimented by the regulating zener on the

secondary side of the converter leading to around

5% load regulation.

It is possible to improve the load regulation, by

connecting a resistor between the zener and the

Vout. Of course, this will degrade the standby

power consumption.

1.2.2 Current Regulation

The current regulation uses the drop voltage

across a shunt resistor R6/R7/R8 to bias the T1

transistor base-emitter junction. The T1 collector

drives the optocoupler limiting the output power.

60kHz

OSCILLATOR

PWM

LATCH

S

Q

R

0.23V

Id

DRAIN

SOURCE

FB

R1

R2

C

+Vdd

Secondary

feedback

I

FB

Is

1 k

Ω

230

Ω