VLS252012CX-1R5M datasheet(21/44 Pages) MICROCHIP

部件名	VLS252012CX-1R5M

功能描述	Cost and Size Optimized PMIC for SAMA5DX/SAM9X6/SAMA7G Series MPUs

PDF	44 Pages

Scroll/Zoom	100%

制造商	MICROCHIP [Microchip Technology]

网页	http://www.microchip.com

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21 / 44 page

 2020 Microchip Technology Inc.

DS20006388A-page 21

MCP16501

For the different OTP options for the t1 to t4 timings see

the respective values in “Configuration Options”.

For power supplies starting at t1, additional delay time

interval is added to the device wake-up time.

The following timing diagram in Figure 4-5 shows the

typical sequence for Case 2:

FIGURE 4-5:

Start-Up from PWRHLD

Timing Diagram.

For all sequences described above, LPM can be

assumed to be low. The MPU will assert LPM after

some time, based on software decision, to enter the

Low-Power mode.

Where:

t1 = Delay from PWRHLD asserted to first

output VOUT1 starting (default 0.5 ms +

device wake-up time, about 100 µs)

t2 = Time from VOUT1 established to VOUT2

starting (default 8 ms)

t3 = Time from VOUT2 established to VOUT3

starting (default 4 ms)

t4 = Time from VOUT3 established to nRSTO

deassertion (default 16 ms)

VLS252012CX-1R5M 数据表(PDF) 21 Page - Microchip Technology