ST72334J2T1 datasheet(16/125 Pages) STMICROELECTRONICS

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ST72334J/N, ST72314J/N, ST72124J

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2.4 FLASH PROGRAM MEMORY

2.4.1 Introduction

Flash devices have a single voltage non-volatile

FLASH memory that may be programmed in-situ

(or plugged in a programming tool) on a byte-by-

byte basis.

2.4.2 Main features

Remote In-Situ Programming (ISP) mode

Up to 16 bytes programmed in the same cycle

MTP memory (Multiple Time Programmable)

Read-out memory protection against piracy

2.4.3 Structural organisation

The FLASH program memory is organised in a

single 8-bit wide memory block which can be used

for storing both code and data constants.

The FLASH program memory is mapped in the up-

per part of the ST7 addressing space (F000h-

FFFFh) and includes the reset and interrupt user

vector area .

2.4.4 In-Situ Programming (ISP) mode

The FLASH program memory can be programmed

using Remote ISP mode. This ISP mode allows

the contents of the ST7 program memory to be up-

dated using a standard ST7 programming tools af-

ter the device is mounted on the application board.

This feature can be implemented with a minimum

number of added components and board area im-

pact.

An example Remote ISP hardware interface to the

standard ST7 programming tool is described be-

low. For more details on ISP programming, refer to

the ST7 Programming Specification.

Remote ISP Overview

The Remote ISP mode is initiated by a specific se-

quence on the dedicated ISPSEL pin.

The Remote ISP is performed in three steps:

– Selection of the RAM execution mode

– Download of Remote ISP code in RAM

– Execution of Remote ISP code in RAM to pro-

gram the user program into the FLASH

Remote ISP hardware configuration

In Remote ISP mode, the ST7 has to be supplied

with power (VDD and VSS) and a clock signal (os-

cillator and application crystal circuit for example).

This mode needs five signals (plus the VDD signal

if necessary) to be connected to the programming

tool. This signals are:

– RESET: device reset

–VSS: device ground power supply

– ISPCLK: ISP output serial clock pin

– ISPDATA: ISP input serial data pin

– ISPSEL: Remote ISP mode selection. This pin

must be connected to VSS on the application

board

If any of these pins are used for other purposes on

the application, a serial resistor has to be imple-

mented to avoid a conflict if the other device forces

the signal level.

Figure 6 shows a typical hardware interface to a

standard ST7 programming tool. For more details

on the pin locations, refer to the device pinout de-

scription.

Figure 6. Typical Remote ISP Interface

2.5 Program Memory Read-out Protection

The read-out protection is enabled through an op-

tion bit.

For FLASH devices, when this option is selected,

the program and data stored in the FLASH memo-

ry are protected against read-out piracy (including

a re-write protection). When this protection option

is removed the entire FLASH program memory is

first automatically erased.

ISPSEL

VSS

RESET

ISPCLK

ISPDATA

ST7

HE10 CONNECTOR TYPE

TO PROGRAMMING TOOL

10k

Ω

CL0

CL1

APPLICATION

4.7k

Ω

XTAL

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