HC05V7GRSSLASHD datasheet(28/170 Pages) NXP

28 / 170 page

SECTION 2: MEMORY MAP

Page 14

MC68HC05V7 Specification Rev. 1.0

Figure 2-3, Figure 2-4, Figure 2-5 and Figure 2-6. Reading from unimplemented bits will

return unknown states, and writing to unimplemented bits will be ignored.

Figure 2-2:

MC68HC05V7 I/O Registers Memory Map

2.3

RAM

The total RAM consists of 384 bytes (including the stack). The stack begins at address

$00FF and proceeds down to $00C0 (64 bytes). Using the stack area for data storage or

temporary work locations requires care to prevent it from being overwritten due to stacking

from an interrupt or subroutine call.

Port A Data Register

Port B Data Register

Port A Data Direction Register

Port B Data Direction Register

16-Bit Timer Status Register

EEPROM Program Register

A/D Data Register

A/D Status & Control Register

$0000

Port C Data Register

Port C Data Direction Register

Alt. Count Register (low)

Alt. Count Register (high)

16 Bit Timer Count Register (low)

16 Bit Timer Count Register (high)

Output Compare Register (low)

Output Compare Register (high)

Input Capture Register (low)

Input Capture Register (high)

16-Bit Timer Control Register

MDLC Rx Status Register

MDLC Tx Control Register

MDLC Status Register

MDLC Control Register

SPI Status Register

SPI Control Register

SPI Data Register

Port D Data Register

Reserved

Unused

Port E Data Register

PWM Data Register

Miscellaneous Register

MDLC Tx Data Register 0

MDLC Tx Data Register 1

MDLC Tx Data Register 2

MDLC Tx Data Register 3

MDLC Tx Data Register 4

MDLC Tx Data Register 5

MDLC Tx Data Register 6

MDLC Tx Data Register 7

MDLC Tx Data Register 8

MDLC Tx Data Register 9

MDLC Tx Data Register 10

MDLC Rx Data Register 0

MDLC Rx Data Register 1

MDLC Rx Data Register 2

MDLC Rx Data Register 3

MDLC Rx Data Register 4

MDLC Rx Data Register 5

MDLC Rx Data Register 6

MDLC Rx Data Register 7

MDLC Rx Data Register 8

MDLC Rx Data Register 9

MDLC Rx Data Register10

IRQ Control and Status Register

Port F Data Register

Port F Data Direction Register

Unused

8-Bit Timer Status & Control

Unused

PWM Control Register

Unused

8-Bit Timer Counter Register

$0001

$0002

$0003

$0004

$0005

$0006

$0007

$0008

$0009

$000A

$000B

$000C

$000D

$000E

$000F

$0010

$0011

$0012

$0013

$0014

$0015

$0016

$0017

$0018

$0019

$001A

$001B

$001C

$001D

$001E

$001F

$0020

$0021

$0022

$0023

$0024

$0025

$0026

$0027

$0028

$0029

$002A

$002B

$002C

$002D

$002E

$002F

$0030

$0031

$0032

$0033

$0034

$0035

$0036

$0037

$0038

$0039

$003A

$003B

$003C

$003D

$003E

$003F

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC05V7GRS/D 数据表(PDF) 28 Page - NXP Semiconductors

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