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STM8AF6366 数据表(PDF) 41 Page - STMicroelectronics |
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STM8AF6366 数据表(HTML) 41 Page - STMicroelectronics |
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41 / 95 page  DS12343 Rev 2 41/95 STM8AF6366 Memory and register map 93 0x00 540B ADC ADC_LTRL ADC low threshold register low 0x00 0x00 540C ADC _AWSRH ADC watchdog status register high 0x00 0x00 540D ADC_AWSRL ADC watchdog status register low 0x00 0x00 540E ADC _AWCRH ADC watchdog control register high 0x00 0x00 540F ADC _AWCRL ADC watchdog control register low 0x00 0x00 5410 to 0x00 541F Reserved area (16 bytes) 1. Depends on the previous reset source. 2. Write only register. Table 11. General hardware register map (continued) Address Block Register label Register name Reset status Table 12. CPU/SWIM/debug module/interrupt controller registers Address Block Register label Register name Reset status 0x00 7F00 CPU(1) A Accumulator 0x00 0x00 7F01 PCE Program counter extended 0x00 0x00 7F02 PCH Program counter high 0x80 0x00 7F03 PCL Program counter low 0x00 0x00 7F04 XH X index register high 0x00 0x00 7F05 XL X index register low 0x00 0x00 7F06 YH Y index register high 0x00 0x00 7F07 YL Y index register low 0x00 0x00 7F08 SPH Stack pointer high 0x17(2) 0x00 7F09 SPL Stack pointer low 0xFF 0x00 7F0A CC Condition code register 0x28 0x00 7F0B to 0x00 7F5F Reserved area (85 bytes) 0x00 7F60 CPU CFG_GCR Global configuration register 0x00 0x00 7F70 ITC ITC_SPR1 Interrupt software priority register 1 0xFF 0x00 7F71 ITC_SPR2 Interrupt software priority register 2 0xFF 0x00 7F72 ITC_SPR3 Interrupt software priority register 3 0xFF 0x00 7F73 ITC_SPR4 Interrupt software priority register 4 0xFF 0x00 7F74 ITC_SPR5 Interrupt software priority register 5 0xFF 0x00 7F75 ITC_SPR6 Interrupt software priority register 6 0xFF 0x00 7F76 to 0x00 7F79 Reserved area (4 bytes) 0x00 7F80 SWIM SWIM_CSR SWIM control status register 0x00 |
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