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STM8AF6366TC 数据表(PDF) 12 Page - STMicroelectronics |
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STM8AF6366TC 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 95 page ![]() Block diagram STM8AF6366 12/95 DS12343 Rev 2 4 Block diagram Figure 1. STM8AF6366 block diagram MS37793V1 XTAL 1-16 MHz RC int. 16 MHz RC int. 128 kHz STM8A core Debug/SWIM SPI LINUART 8-bit basic timer (TIM4) Reset block Reset POR BOR Clock controller Detector Clock to peripherals and core 10 Mbit/s Master/slave automatic resynchronization Window WDG Up to 32 Kbyte program Flash Up to 1 Kbyte 2 Kbyte RAM 10-bit ADC Reset 400 Kbit/s Single wire debug interface 16-bit advanced control timer (TIM1) 16-bit general purpose timers (TIM2, TIM3) data EEPROM AWU timer Independent WDG 9 CAPCOM channels Up to 16 channels I2C Boot ROM |
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