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STM32C011F6U6 数据表(PDF) 74 Page - STMicroelectronics |
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STM32C011F6U6 数据表(HTML) 74 Page - STMicroelectronics |
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74 / 94 page ![]() Electrical characteristics STM32C011x4/x6 74/94 DS13866 Rev 3 support Fm+ low-level output current maximum requirement. Refer to Section 5.3.13: I/O port characteristics for the I2C I/Os characteristics. All I2C SDA and SCL I/Os embed an analog filter. Refer to the following table for its characteristics: SPI/I2S characteristics Unless otherwise specified, the parameters given in Table 61 for SPI are derived from tests performed under the ambient temperature, fPCLKx frequency and supply voltage conditions summarized in Table 23: General operating conditions. The additional general conditions are: • OSPEEDRy[1:0] set to 11 (output speed) • capacitive load C = 30 pF • measurement points at CMOS levels: 0.5 x VDD Refer to Section 5.3.13: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). Table 60. I2C analog filter characteristics(1) Symbol Parameter Min Max Unit tAF Limiting duration of spikes suppressed by the filter(2) 50 260 ns 1. Specified by design – Not tested in production. 2. Spikes shorter than the limiting duration are suppressed. Table 61. SPI characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fSCK 1/tc(SCK) SPI clock frequency Master mode 2. V < VDD < 3.6 V -- 24 MHz Master transmitter mode 2. V < VDD < 3.6 V 24 Slave receiver mode 24 Slave transmitter mode/full duplex(2) 2.7 V < VDD < 3.6 V 24 Slave transmitter mode/full duplex(2) 2 V < VDD < 3.6 V 22 tsu(NSS) NSS setup time Slave mode 4 * TPCLK -- ns th(NSS) NSS hold time 2 * TPCLK -- ns tw(SCKH) tw(SCKL) SCK high and low time Master mode TPCLK - 1 TPCLK TPCLK + 1 ns - SCK low time Master mode TPCLK - 2 TPCLK TPCLK + 2 ns tsu(MI) Data input setup time Master mode 4.5 - - ns tsu(SI) Slave mode 2 - - ns |
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