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9SQL4954 数据表(PDF) 1 Page - Renesas Technology Corp |
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9SQL4954 数据表(HTML) 1 Page - Renesas Technology Corp |
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1 / 30 page  1 ©2020 Renesas Electronics Corporation February 19, 2020 Description The 9SQL4952/9SQL4954/9SQL4958 devices comprise a family of 3.3V PCIe Gen1–5 clock generators with UPI support. There are 2, 4 and 8 outputs versions available and each differential output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. PCIe Clocking Architectures ▪ Common Clocked (CC) ▪ Independent Reference (IR) with and without spread spectrum (SRIS, SRNS) Typical Applications ▪ Servers/High-Performance Computing ▪ nVME Storage ▪ Networking ▪ Accelerators ▪ Industrial Control Key Specifications ▪ 90fs RMS typical jitter (PCIe Gen5 CC) ▪ 70fs RMS typical jitter (QPI ≤ 11.4Gb/s, 12UI) ▪ < 50ps cycle-to-cycle jitter on differential outputs ▪ < 50ps output-to-output skew on differential outputs ▪ ±0ppm synthesis error on differential outputs Features ▪ Integrated terminations for 85Ω systems save 4 resistors per output ▪ 112–206 mW typical power consumption (at 3.3V) ▪ VDDIO rail allows 35% power savings at optional 1.05V (9SQL4958 only) ▪ Devices contain default configuration; SMBus not required ▪ SMBus features allow optimization to application: • Input polarity and pull-up/pull-downs • Output slew rate and amplitude • Output impedance (33Ω, 85Ω or 100Ω) ▪ Contact factory for customized default configurations ▪ 25MHz input frequency ▪ OE# pins support PCIe CLKREQ# function ▪ Pin-selectable SRnS 0%, CC 0% and CC/SRIS -0.5% spread ▪ SMBus-selectable CC/SRIS -0.25% spread ▪ Clean switching between the CC/SRIS spread settings ▪ BCLK outputs blocked until PLL is locked for clean system startup ▪ 2 selectable SMBus addresses ▪ Space-saving packages: See Ordering Information for details Output Features ▪ 2, 4 or 8 100MHz CPU/PCIe output pairs ▪ One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support ▪ See AN-891 for easy AC-coupling to other logic families Block Diagram n+1 XIN/CLKIN_25 X2 vOE(n:0)# REF3.3 vSADR ^vSS_EN_tri ^CKPWRGD_PD# SDATA_3.3 SCLK_3.3 Control Logic SSC Capable PLL GND EPAD VDDA VDDREF VDDXTAL VDDDIG VDDO/ VDDIO GNDXTAL GNDREF GNDDIG BCLKn# 2 to 8 outputs BCLKn BCLK0# BCLK0 9SQL4952/9SQL4954/ 9SQL4958 Datasheet 3.3V PCIe® Gen1–5 and UPI Clock Generator Family |
类似零件编号 - 9SQL4954 |
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类似说明 - 9SQL4954 |
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