LIS2L01

4/6

Figure 1. Equivalent electrical circuit

1.2 IC Interface

The complete signal processing uses a fully differential structure, while the final stage converts the differential

signal into a single-ended to be compatible with the external world.

The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at the

output to cancel the offset and the 1/f noise.

frequency is set to be 30Hz.

This filter is implemented using SC technique, which allows to realize a fully integrated system that avoid the

use of any external component.

The low noise input amplifier operates at 100 kHz while the two SC filters operate at 50 kHz sampling frequency.

This allows a large oversampling ratio, able to reduce in-band noise and to obtain an accurate output waveform.

The signal at the output of the SC filter is sampled and held using a different clock to avoid that the filter output

value during the CDS phase reaches the output pin.

All the analog parameter (output offset voltage and sensitivity) are ratiometric to the supply voltage. Increasing

or decreasing the supply voltage, the sensitivity and the offset will increase or decrease linearly. The feature

provides the cancellation of the error related to the supply voltage in the analog to digital conversion chain.

1.3 Factory calibration

In the IC interface different calibrations take place at factory level to provide to final user a device ready to be

used, the trimmed parameters are: gain, offset and cut off frequency of the SC filter.

The trimmed value are stored in the device with a poly-fuse technique. Any time the device is turned on the

memorized bits are loaded into the registers to be utilized during the normal operation. The poly-fuse approach

allow the final user to use the device without any need for further calibration.

S1x

rot

S2x

S1y

S2y