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80C554 数据表(PDF) 13 Page - NXP Semiconductors |
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80C554 数据表(HTML) 13 Page - NXP Semiconductors |
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13 / 76 page ![]() Philips Semiconductors Preliminary specification 80C554/83C554/87C554 80C51 8-bit microcontroller – 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP 2000 Nov 10 13 AUXR1 Reset Value = 0000 00x0B ADC8 AIDL SRST GF2 WUPD 0 — DSP Not Bit Addressable Bit: Symbol Function DPS Data Pointer Switch—switches between DPRT0 and DPTR1. DPS Operating Mode 0 DPTR0 1 DPTR1 WUPD Enable wakeup from powerdown. GF2 General Purpose Flag—set and cleared by the user. SRST Software Reset AIDL Enables the ADC during idle mode. ADC8 ADC Mode Switch—switches between 10-bit conversion and 8-bit conversion. ADC8 Operating Mode 0 10-bit conversion (50 machine cycles) 1 8-bit conversion (24 machine cycles) NOTE: *User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate. SU01081 7654 321 0 Address = A2H Figure 7. AUXR1: DPTR Control Register |
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