数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

80C554 数据表(PDF) 13 Page - NXP Semiconductors

部件名 80C554
功能描述  80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP
PDF  76 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

80C554 数据表(HTML) 13 Page - NXP Semiconductors

Back Button 80C554 Datasheet HTML 9Page - NXP Semiconductors 80C554 Datasheet HTML 10Page - NXP Semiconductors 80C554 Datasheet HTML 11Page - NXP Semiconductors 80C554 Datasheet HTML 12Page - NXP Semiconductors 80C554 Datasheet HTML 13Page - NXP Semiconductors 80C554 Datasheet HTML 14Page - NXP Semiconductors 80C554 Datasheet HTML 15Page - NXP Semiconductors 80C554 Datasheet HTML 16Page - NXP Semiconductors 80C554 Datasheet HTML 17Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 76 page
background image
Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
13
AUXR1
Reset Value = 0000 00x0B
ADC8
AIDL
SRST
GF2
WUPD
0
DSP
Not Bit Addressable
Bit:
Symbol
Function
DPS
Data Pointer Switch—switches between DPRT0 and DPTR1.
DPS
Operating Mode
0
DPTR0
1
DPTR1
WUPD
Enable wakeup from powerdown.
GF2
General Purpose Flag—set and cleared by the user.
SRST
Software Reset
AIDL
Enables the ADC during idle mode.
ADC8
ADC Mode Switch—switches between 10-bit conversion and 8-bit conversion.
ADC8
Operating Mode
0
10-bit conversion (50 machine cycles)
1
8-bit conversion (24 machine cycles)
NOTE:
*User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that
case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
SU01081
7654
321
0
Address = A2H
Figure 7. AUXR1: DPTR Control Register



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com