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80C652 数据表(PDF) 2 Page - NXP Semiconductors

部件名 80C652
功能描述  CMOS single-chip 8-bit microcontrollers
PDF  25 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

80C652 数据表(HTML) 2 Page - NXP Semiconductors

  80C652 Datasheet HTML 1Page - NXP Semiconductors 80C652 Datasheet HTML 2Page - NXP Semiconductors 80C652 Datasheet HTML 3Page - NXP Semiconductors 80C652 Datasheet HTML 4Page - NXP Semiconductors 80C652 Datasheet HTML 5Page - NXP Semiconductors 80C652 Datasheet HTML 6Page - NXP Semiconductors 80C652 Datasheet HTML 7Page - NXP Semiconductors 80C652 Datasheet HTML 8Page - NXP Semiconductors 80C652 Datasheet HTML 9Page - NXP Semiconductors Next Button
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VSS
VDD
RST
XTAL1
XTAL2
ALE
PSEN
RxD
TxD
INT0
INT1
T0
T1
WR
RD
SCL
SDA
EA
Phlips Semiconductors
Product specification
80C652/83C652
CMOS single-chip 8-bit microcontrollers
2
1996 Aug 15
DESCRIPTION
The P80C652/83C652 Single-Chip 8-Bit
Microcontroller is manufactured in an
advanced CMOS process and is a derivative
of the 80C51 microcontroller family. The
80C652/83C652 has the same instruction set
as the 80C51. Three versions of the
derivative exist:
83C652 — 8k bytes mask programmable
ROM
80C652 — ROMless version
87C652 — EPROM version (described in a
separate chapter)
This device provides architectural
enhancements that make it applicable in a
variety of applications for general control
systems. The 8XC652 contains a non-volatile
8k
× 8 read-only program memory, a volatile
256
× 8 read/write data memory, four 8-bit I/O
ports, two 16-bit timer/event counters
(identical to the timers of the 80C51), a
multi-source, two-priority-level, nested
interrupt structure, an I2C interface, UART
and on-chip oscillator and timing circuits. For
systems that require extra capability, the
8XC652 can be expanded using standard
TTL compatible memories and logic.
The device also functions as an arithmetic
processor having facilities for both binary and
BCD arithmetic plus bit-handling capabilities.
The instruction set consists of over 100
instructions: 49 one-byte, 45 two-byte and 17
three-byte. With a 16(24)MHz crystal, 58% of
the instructions are executed in 0.75(0.5)
µs
and 40% in 1.5(1)
µs. Multiply and divide
instructions require 3(2)
µs.
LOGIC SYMBOL
FEATURES
• 80C51 central processing unit
• 8k × 8 ROM expandable externally to
64k bytes
• 256 × 8 RAM, expandable externally to
64k bytes
• Two standard 16-bit timer/counters
• Four 8-bit I/O ports
• I2C-bus serial I/O port with byte oriented
master and slave functions
• Full-duplex UART facilities
• Power control modes
– Idle mode
– Power-down mode
• ROM code protection
• Extended frequency range: 1.2 to 24 MHz
• Three operating ambient temperature
ranges:
0 to +70
°C
–40 to +85
°C
–40 to +125
°C
PIN CONFIGURATIONS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
SCL/P1.6
RST
RxD/P3.0
TxD/P3.1
INT0/P3.2
INT1/P3.3
T0/P3.4
T1/P3.5
SDA/P1.7
RD/P3.7
XTAL2
XTAL1
VSS
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE
EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
6
1
40
7
17
39
29
18
28
44
34
1
11
33
23
12
22
WR/P3.6
PLASTIC
DUAL
IN-LINE
PACKAGE
PLASTIC
LEADED
CHIP
CARRIER
PLASTIC
QUAD
FLAT
PACK



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