Data Sheet

LT4322

analog.com

Rev. 0

16 of 29

Figure 24. LT4322 Active Rectifier Diode Building Block

Design Example

Figure 24 shows an LT4322 building block circuit that replaces a Schottky or rectifier diode in AC rectification

applications. This building block can be used to construct half-wave rectifiers, full-wave rectifiers, and full bridge

rectifiers. The following example shows how to choose components for a 60Hz, 24VRMS full-bridge application circuit

with a 2A average output load current. The AC input is applied to the ANODE.

A 24VRMS input waveform is typically 34V peak and 68V peak-to-peak. In a full-bridge application, each power MOSFET

has a maximum drain-to-source voltage that is half of the peak-to-peak voltage, or 34V in this case. Choose a power

MOSFET using equation (3).

RDS(ON)< 10 mV/(3 × 2A) = 16.7mΩ

(9)

The BUK7M15-60E is a good choice for this application, with its 60V drain-to-source voltage rating and 13mΩ typical

RDS(ON)at VGS = 10V. Additionally, its minimum threshold voltage VGS(TH) of 2.4V ensures that the LT4322 will be able to

turn it off quickly to prevent reverse conduction when the ANODE voltage falls below the CATHODE voltage.

Because the BUK7M15-60E’s CISS is much lower than 10nF, a 10nF capacitor CG is connected between the gate and

source of the power MOSFET for optimal compensation of the LT4322’s transconductance amplifier.

Choose a hold-up cap for a 60Hz input waveform:

CVDDA(µF)= 1,500× (1/60Hz) = 25µF

(10)

Rounding to the nearest standard value capacitor, a 22µF, 25V electrolytic capacitor is chosen.

PCB Layout Considerations

Special attention should be given to the PC board layout to ensure a stable and efficient application circuit. Figure

25 shows a representative 2-layer PCB to outline some of the primary considerations. U1 is the LT4322, M1 is the

power MOSFET, and M2 is the depletion MOSFET.

Connect the ANODE, VSSA, and CATHODE as close as possible to the MOSFET source and drain pins. Use a Kelvin

connection from the ANODE pin to the source of the external MOSFET. Lay out the ANODE and VSSA connections so

that the VSSA currents are minimized in the ANODE connection. Keep the drain and source traces to the MOSFET wide

and short to minimize parasitic resistance. Keep the trace from the LT4322 GATE pin to the MOSFET gate short and

wide. This practice will reduce the chance of MOSFET parasitic oscillations. Locate the GATE trace near the ANODE

side of the circuit, not the CATHODE side, in order to minimize coupling from the CATHODE connection to the GATE.

Place the CVDDA as close as possible to the VDDA and VSSA pins. Use short, wide traces to connect CVDDAto VDDA and VSSA.

M1

CVDDA

22µF

CG

10nF

GATE CATHODE

VSSA

VDDA

VDDC

ANODE

LT4322

BUK7M15-60EX

ACTIVE RECTIFIER DIODE BUILDING BLOCK

CATHODE

ANODE

(AC < 60V p-p)