Table 10. Power mode versus power supply

VCC_VCONN ENABLE

IDC

VCC_VCONN

IDC ENABLE

Mode

Comments

X

0 V

0 µA(2)

0 µA(1)(2)

OFF

(reset)

Gate driver OFF / CC switches OFF

FLGn inactive

I2C inactive / I2C registers reset

X

1.8 V

±5%

3.3 V

±10%

0 µA(2)

0 µA(1)(2)

Hibernate

I2C active

Default state at start-up

X

1.8 V

±5%

3.3 V

±10%

0 µA(2)

< 10 µA (1)(2)

(3)

Low

power

High ohmic CC => PD communication not possible

OVP protection by clamping

I2C active

3.3 V ±10%

5 V ±10%

1.8 V

±5%

3.3 V

±10%

2.7 mA

< 30 µA(1)(2)

Normal

Full performance mode

I2C active

FLGn indicates failures

1. Dynamic current of I2C interface have to be added to the values indicated when the I2C bus is used.

2. ESD leakage current have to be added to the values indicated.

3. For pin EN voltage between 1.7 V and 3.6 V.

Table 11. TCPP02-M18 states versus power modes

Power

mode

CC

switches

OVP CC

Gate driver

provider

FLGn

I2C IANA

OCP

VBUS

VCONN VBUS

Dis.

Comment

OFF

OFF

NA

OFF

VBUS

connect

OFF OFF

OFF

OFF

TCPP not powered

Hibernate

OFF

NA

OFF

VBUS

connect

ON OFF

OFF

OFF

Default state at

start-up

Low power

High ohmic

5 V

clamp

OFF

VBUS

connect

ON OFF

OFF

OFF

Signaling only

Normal

Full perf.

Active

OVP

Controlled by

I2C

Failure

flags

ON

ON

ON

Controlled by

I2C

PD communication

active

TCPP02-M18

Power modes

DS13787 - Rev 4

page 10/27