2

Pin configuration

Figure 2. Pin configuration (top view)

Note:

The upper metallic package lid is connected to ground. The bottom metallization is electrically floating.

Table 1. Pin description

Pin name

Flat-16P

Pin description

VO (1)

1, 2, 6, 7 Output port of the regulator

VI (2)

3, 4, 5

Input port of the regulator

GND

12, 13

Ground

ISC

8

Current limit setting pin. Connect a resistor (Rsc) between this pin and VI to set the current limit

threshold.

OCM

10

Overcurrent monitor flag. Open collector, internally pulled up.

The signal on this pin goes to low logic level when the current limit activates.

INHIBIT

14

Device inhibit pin. Internally pulled down.

The regulator is off when this pin is set at high logic level.

ADJ/SENSE

15

Feedback pin

FILT C

9

Filter capacitor pin. An optional capacitor (Cfilt) can be connected between this pin and GND for SET

mitigation and noise purposes.

STAB

11

An optional R-C network can be connected between this pin and GND to tune the internal control

loop.

IN+

16

Non-Inverting input of the error amplifier

1. All the output pins must be connected together on the PCB.

2. All input pins must be connected together on the PCB.

Table 2. Recommended minimum and maximum operative conditions

Symbol

Parameter

Value

Unit

VI

DC input voltage, VI-VGROUND

2.5 to 12

V

VO

DC output voltage range

0.6 to 9

V

IO

Continuous output current

0 to 2

A

TA

Ambient operating temperature range

- 55 to +125

°C

RHFL6000L

Pin configuration

DS14125 - Rev 1

page 3/28