9

Integrated

Circuit

Systems, Inc.

ICS9DB401

1014B—09/07/06

SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD)

Pin #

Name

Control Function

Type0

1

PWD

Bit 7

PD_Mode

PD# drive mode

RW

driven

Hi-Z

0

Bit 6

STOP_Mode

SRC_Stop# drive mode

RW

driven

Hi-Z

0

Bit 5

PD_SRC_INV

Power Down

and SRC Invert

RW

Normal

Invert

0

Bit 4

Reserved

Reserved

RW

X

Bit 3

Reserved

Reserved

RW

X

Bit 2

PLL_BW#

Select PLL BW

RW High BW Low BW

1

Bit 1

BYPASS#

BYPASS#/PLL

RW

fan-out

ZDB

1

Bit 0

SRC_DIV#

SRC Divide by 2 Select

RW

x/2

1x

1

SMBus Table: Output Control Register

Pin #

Name

Control Function

Type0

1

PWD

Bit 7

Reserved

Reserved

RW

X

Bit 6

DIF_6

Output Control

RW

Disable

Enable

1

Bit 5

DIF_5

Output Control

RW

Disable

Enable

1

Bit 4

Reserved

Reserved

RW

X

Bit 3

Reserved

Reserved

RW

X

Bit 2

DIF_2

Output Control

RW

Disable

Enable

1

Bit 1

DIF_1

Output Control

RW

Disable

Enable

1

Bit 0

Reserved

Reserved

RW

X

SMBus Table: Output Control Register

Pin #

Name

Control Function

Type0

1

PWD

Bit 7

Reserved

Reserved

RW

X

Bit 6

DIF_6

Output Control

RW

Free-run Stoppable

0

Bit 5

DIF_5

Output Control

RW

Free-run Stoppable

0

Bit 4

Reserved

Reserved

RW

X

Bit 3

Reserved

Reserved

RW

X

Bit 2

DIF_2

Output Control

RW

Free-run Stoppable

0

Bit 1

DIF_1

Output Control

RW

Free-run Stoppable

0

Bit 0

Reserved

Reserved

RW

X

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

Reserved

-

-

Reserved

Byte 0

-

-

-

-

-

Reserved

-

Byte 1

-

22,23

19,20

-

-

9,10

6,7

-

Byte 2

-

22,23

19,20

-

-

9,10

6,7

-