HIP6020A

FN4735 Rev 2.00

Page 13 of 16

September 2001

Linear Output Capacitors

The output capacitors for the linear regulators provide dynamic

load current. Thus capacitors COUT3 and COUT4 should be

selected for transient load regulation.

PWM Output Inductor Selection

Each PWM converter requires an output inductor. The output

inductor is selected to meet the output voltage ripple

requirements and sets the converter’s response time to a load

transient. Additionally, PWM2 output inductor has to meet the

minimum value criteria for loop stability as described in

paragraph ‘PWM2 Controller Feedback Compensation’. The

inductor value determines the converter’s ripple current and

the ripple voltage is a function of the ripple current. The ripple

voltage and current are approximated by the following

equations:

Increasing the value of inductance reduces the ripple current

and voltage. However, the large inductance values increase

the converter’s response time to a load transient.

One of the parameters limiting the converter’s response to a

load transient is the time required to change the inductor current.

Given a sufficiently fast control loop design, the HIP6020A will

provide either 0% or 100% duty cycle in response to a load

transient. The response time is the time interval required to slew

the inductor current from an initial current value to the post-

transient current level. During this interval the difference

between the inductor current and the transient current level must

be supplied by the output capacitor(s). Minimizing the response

time can minimize the output capacitance required.

The response time to a transient is different for the application

of load and the removal of load. The following equations give

the approximate response time interval for application and

removal of a transient load:

where: ITRAN is the transient load current step, tRISE is the

response time to the application of load, and tFALL is the

response time to the removal of load. Be sure to check both of

these equations at the minimum and maximum output levels

for the worst case response time.

Input Capacitor Selection

The important parameters for the bulk input capacitor are the

voltage rating and the RMS current rating. For reliable

operation, select bulk input capacitors with voltage and current

ratings above the maximum input voltage and largest RMS

current required by the circuit. The capacitor voltage rating

should be at least 1.25 times greater than the maximum input

voltage. The RMS current rating requirement for the input

capacitors of a buck regulator is approximately 1/2 of the

summation of the DC output load current.

Use a mix of input bypass capacitors to control the voltage

overshoot across the MOSFETs. Use ceramic capacitance for

the high frequency decoupling and bulk capacitors to supply

the RMS current. Small ceramic capacitors can be placed very

close to the upper MOSFET to suppress the voltage induced in

the parasitic circuit impedances.

For a through-hole design, several electrolytic capacitors

(Panasonic HFQ series or Nichicon PL series or Sanyo MV-GX

or equivalent) may be needed. For surface mount designs,

solid tantalum capacitors can be used, but caution must be

exercised with regard to the capacitor surge current rating.

These capacitors must be capable of handling the surge

current at power-up. The TPS series available from AVX, and

the 593D series from Sprague are both surge current tested.

MOSFET Selection/Considerations

The HIP6020A requires 5 external transistors. Three

N-Channel MOSFETs are employed by the PWM converters.

The GTL and memory linear controllers can each drive a

MOSFET or a NPN bipolar as a pass transistor. All these

transistors should be selected based upon rDS(ON), current

gain, saturation voltages, gate supply requirements, and

thermal management considerations.

PWM1 MOSFET Selection and Considerations

In high-current PWM applications, the MOSFET power

dissipation, package selection and heatsink are the dominant

design factors. The power dissipation includes two loss

components; conduction loss and switching loss. These losses

are distributed between the upper and lower MOSFETs according

to the duty factor. The conduction losses are the main component

of power dissipation for the lower MOSFETs. Only the upper

MOSFET has significant switching losses, since the lower device

turns on and off into near zero voltage.

The equations presented assume linear voltage-current

transitions and do not model power loss due to the reverse

recovery of the lower MOSFET’s body diode. The gate charge

losses are dissipated by the HIP6020A and don't heat the

MOSFETs. However, large gate-charge increases the

switching time, tSW, which increases the upper MOSFET

switching losses. Ensure that both MOSFETs are within their

maximum junction temperature at high ambient temperature by

calculating the temperature rise according to package thermal

resistance specifications. A separate heatsink may be

necessary depending upon MOSFET power, package type,

ambient temperature and air flow.

I

VIN VOUT

–

FS L



--------------------------------

VOUT

VIN

----------------



=

VOUT



I



ESR



=

tRISE

LO ITRAN



VIN VOUT

–

--------------------------------

=

tFALL

LO ITRAN



VOUT

-------------------------------

=

PUPPER

IO

2

rDS ON





VOUT



VIN

------------------------------------------------------------

IO VIN



tSW



FS



2

----------------------------------------------------

+

=

PLOWER

IO

2

rDS ON





VIN VOUT

–





VIN

---------------------------------------------------------------------------------

=