HIP6020A

FN4735 Rev 2.00

Page 14 of 16

September 2001

The rDS(ON) is different for the two equations above even if the

same device is used for both. This is because the gate drive

applied to the upper MOSFET is different than the lower

MOSFET. Figure 10 shows the gate drive where the upper

MOSFET’s gate-to-source voltage is approximately VCC less

the input supply. For +5V main power and +12VDC for the bias,

the gate-to-source voltage of Q1 is 7V. The lower gate drive

voltage is +12VDC. A logic-level MOSFET is a good choice for

Q1 and a logic-level MOSFET can be used for Q2 if its absolute

gate-to-source voltage rating exceeds the maximum voltage

applied to VCC.

Rectifier CR1 is a clamp that catches the negative inductor

swing during the dead time between the turn off of the lower

MOSFET and the turn on of the upper MOSFET. The diode

must be a Schottky type to prevent the lossy parasitic MOSFET

body diode from conducting. It is acceptable to omit the diode

and let the body diode of the lower MOSFET clamp the negative

inductor swing, but efficiency could drop, in some cases, one or

two percent as a result. The diode's rated reverse breakdown

voltage must be greater than the maximum input voltage.

PWM2 MOSFET and Schottky Selection

The power dissipation in PWM2 converter is similar to PWM1

except that the power losses of the lower device are taking

place in a Schottky instead of a MOSFET. The power losses of

PWM2 converter are distributed between the upper MOSFET

and the Schottky. The following equations describe an

approximation of this distribution and assume a linear voltage-

current switching transitions.

For the fully on option (SELECT pin high) selection of the

MOSFET is based on the voltage budget available to this

regulator. Since the MOSFET is operated as a switch, its own

rDS(ON) is bound by the maximum voltage drop allowable

across it at the maximum output current.

Where

rDS(ON)max - maximum allowed MOSFET rDS(ON)

DCR - output inductor DC resistance

In applications where both output settings could be engaged

(both 1.5V and fully on MOSFET) it is recommended the

MOSFET meets criteria outlined for the PWM operation as well

as the fully on operation.

Linear Controllers Transistor Selection

The HIP6020A linear controllers are compatible with both NPN

bipolar as well as N-Channel MOSFET transistors. The main

criteria for selection of pass transistors for the linear regulators

is package selection for efficient removal of heat. The power

dissipated in a linear regulator is

Select a package and heatsink that maintains the junction

temperature below the maximum desired temperature with the

maximum expected ambient temperature.

When selecting bipolar NPN transistors for use with the linear

controllers, insure the current gain at the given operating VCE

is sufficiently large to provide the desired output load current

when the base is fed with the minimum driver output current.

FIGURE 10. UPPER GATE DRIVE - DIRECT VCC DRIVE

+12V

PGND

HIP6020A

GND

LGATE

UGATE

PHASE

VCC

+5V OR LESS

NOTE:

NOTE:

VGS VCC

Q1

Q2

+

-

VGS VCC -5V

CR1

PMOS

IO

2

rDS ON





VOUT



VIN

------------------------------------------------------------

IO VIN



tSW



FS



2

----------------------------------------------------

+

=

PSCH

IO Vf



VIN VOUT

–





VIN

-------------------------------------------------------------

=

rDS ON

max

VIN DCR IOUT





–

IOUT

----------------------------------------------------

=

PLINEAR

IO VIN VOUT

–





=