ICS853S024AY REVISION A JULY 20, 2011

2

©2011 Integrated Device Technology, Inc.

ICS853S024 Data Sheet

LOW SKEW, 1-TO-24, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER

Table 1. Pin Descriptions

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1, 16, 18, 31,

33, 34, 50, 63, 64

VCC

Power

Power supply pins.

2, 15, 17, 32, 49

VEE

Power

Negative supply pins.

3, 4

Q0, nQ0

Output

Differential clock outputs. LVPECL interface levels.

5, 6

Q1, nQ1

Output

Differential clock outputs. LVPECL interface levels.

7, 8

Q2, nQ2

Output

Differential clock outputs. LVPECL interface levels.

9, 10

Q3, nQ3

Output

Differential clock outputs. LVPECL interface levels.

11, 12

Q4, nQ4

Output

Differential clock outputs. LVPECL interface levels.

13, 14

Q5, nQ5

Output

Differential clock outputs. LVPECL interface levels.

19, 20

Q6, nQ6

Output

Differential clock outputs. LVPECL interface levels.

21, 22

Q7, nQ7

Output

Differential clock outputs. LVPECL interface levels.

23, 24

Q8, nQ8

Output

Differential clock outputs. LVPECL interface levels.

25, 26

Q9, nQ9

Output

Differential clock outputs. LVPECL interface levels.

27, 28

Q10, nQ10

Output

Differential clock outputs. LVPECL interface levels.

29, 30

Q11, nQ11

Output

Differential clock outputs. LVPECL interface levels.

35, 36

Q12, nQ12

Output

Differential clock outputs. LVPECL interface levels.

37, 38

Q13, nQ13

Output

Differential clock outputs. LVPECL interface levels.

39, 40

Q14, nQ14

Output

Differential clock outputs. LVPECL interface levels.

41, 42

Q15, nQ15

Output

Differential clock outputs. LVPECL interface levels.

43, 44

Q16, nQ16

Output

Differential clock outputs. LVPECL interface levels.

45, 46

Q17, nQ17

Output

Differential clock outputs. LVPECL interface levels.

47

PCLK

Input

Pulldown

Non-inverting differential LVPECL clock input.

48

nPCLK

Input

Pullup/

Pulldown

Inverting differential LVPECL clock input. VCC/2 default when left

floating.

51, 52

Q18, nQ18

Output

Differential clock outputs. LVPECL interface levels.

53, 54

Q19, nQ19

Output

Differential clock outputs. LVPECL interface levels.

55, 56

Q20, nQ20

Output

Differential clock outputs. LVPECL interface levels.

57, 58

Q21, nQ21

Output

Differential clock outputs. LVPECL interface levels.

59, 60

Q22, nQ22

Output

Differential clock outputs. LVPECL interface levels.

61, 62

Q23, nQ23

Output

Differential clock outputs. LVPECL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

CIN

Input Capacitance

2pF

RPULLUP

Input Pullup Resistor

51

k

Ω

RPULLDOWN

Input Pulldown Resistor

51

k

Ω