MIC2584/2585

Micrel

MIC2584/2585

4

March 2005

Pin Number

Pin Number

Pin Name

Pin Function

MIC2584

MIC2585

3, 14

3, 22

GATE2, GATE1

Gate Drive (Outputs): Connect each output to the gates of external

N-Channel MOSFETs. When ON is asserted, a 14

µA current source is

activated and begins to charge the gate of the N-Channel MOSFET connected

to this pin. An internal clamp ensures that no more than 10V is applied

between the GATE and Source when VCC1 or VCC2 is above 5V. When the

circuit breaker trips or when an input undervoltage lockout condition is

detected, the GATE1 and GATE2 pins are immediately brought low.

9

13

GND

Ground: Tie to analog ground.

7

10

CPOR

Power-On Reset Timer (Input): A capacitor connected between this pin and

ground sets the start-up delay (t

(t

asserts, the capacitor connected to CPOR begins to charge. When the

voltage at CPOR crosses 0.3V, the start-up threshold (V

is initiated as the GATE outputs begin to ramp while capacitor C

immediately discharged to ground. When the voltage at the lagging FB pin

rises above its threshold (V

When the voltage at CPOR rises above the power-on reset delay threshold

(V

deasserted. If C

8

11

CFILTER

Current Limit Response Timer (Input): A capacitor connected to this pin

defines the period of time, t

to signal a fault condition and trip the circuit breaker. When an overcurrent

condition occurs, a 2.5

µA current source begins to charge this capacitor. If

the voltage at this pin reaches 1.235V, the circuit breaker is tripped, both

GATE pins immediately shut off, and /FAULT is asserted. If C

then t

5, 12

7, 18

FB2, FB1

Power-Good Threshold Input (Undervoltage Detect): FB1 and FB2 are

internally compared to 1.235V and 0.80V references with 25mV of hyster-

esis, respectively. External resistive divider networks may be used to set the

voltage at these pins. If either FB input momentarily goes below its thresh-

old, then /POR is activated for one timing cycle, t

undervoltage condition. The /POR signal deasserts one timing cycle after the

FB pin exceeds its power-good threshold by 25mV. A 5

µs filter on these pins

prevents glitches from inadvertently activating the /POR signal.

10

14

/FAULT

Circuit Breaker Fault Status (Output): Active-Low, weak pull-up to VCC1 or

open-drain. Asserted when the circuit breaker is tripped due to an

overcurrent, undervoltage lockout, or overvoltage event. When deasserted,

the MIC2585 will initiate a new start cycle by toggling the ON pin.

11

15

/POR

Power-On Reset (Output): Active Low, weak pull-up to VCC1 or open drain.

This pin remains asserted during start-up until a time period (t

lagging FB pin threshold (V

C

falls below V

4, 13

5, 20

OUT2, OUT1

Output Voltage Monitor (Inputs): For output tracking, connect these pins to

their respective output to sense the output voltage.

N/A

12

CDLY

Output Sequence Delay Timer (Input): This pin is internally clamped to 6V.

A capacitor connected to this pin sets a timer delay, t

and V

resistor, and if C

with the same dv/dt as depicted in the Tracking Mode diagram while

maintaining a maximum voltage differential between V

N/A

9

TRK

Discharge Tracking Mode Pin (Input): Tie this pin to OUT1 or OUT2 to

enable tracking during turn-off cycle. Ground this pin to disable tracking

during turn-off. The TRK pin is not to be used as a digital input.