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CS4811 数据表(PDF) 4 Page - Applied Micro Circuits Corporation |
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CS4811 数据表(HTML) 4 Page - Applied Micro Circuits Corporation |
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4 / 5 page ![]() 4 Empowering Intelligent Optical Networks FINAL Product Brief TIGRIS OC-48 Multi Protocol Termination for 2047 Channels Part Number S4811, Rev. 2.4 July 2006 • Extensive per channel statistics that include: • Good RX cells. • Good TX cells. • RX loss of cell delineation events. • RX HEC errors single bit corrected. • RX HEC errors uncorrected. • RX PLCP BIP errors. • RX PLCP Remote Alarm Detected indicator. • RX PLCP OOF indication. • Global count of TX HEC errors received over SPI-3 in 56B mode. Queue Management • On chip queue management. • Multiple RX High/Low priority queues with programmable service priority arbitration. • Per channel TX High/Low priority queues with programmable watermarks and optional discard at high threshold. • Full “out of band” access to on chip queue threshold status via a 15 pin Queue Access Bus interface. Useful for monitoring the fill level of TX and RX queues for flow control operation. • Per TX queue enable/disable for IMA group channel synchronization. Buffer Structure and Memory Management • Manages packet data as it is moved in and out of external SDRAM. • On-chip pointer storage memory. • Supports 96K packet/cell buffers. • Configurable buffer size from 2KB to 16KB. • Buffers are automatically linked into virtual buffers to hold larger packets. • RX HDLC or direct mapped packets can be by fragmented in Nx8byte sizes and queued for transmission on the System Interface to provide a lower latency than full packet store and forward. Figure 3: TIGRIS Expansion Mode used for a 2 x OC-12 solution with 4k channels EVROS S1208 TIGRIS S4811 AMCC Flexible Tributary Interface (FTI) 622MHz BW Supports any valid combination of the following: 1xSTS12c, 4xSTS3c, 12xSTS1 12DS3/E3, 336DS1/VT1.5, 252E1/VT2 HDLC/ATM controllers 4094 packet/cell channels Supports fractional DS3 SONET to PDH framer/mapper 1xOC-12, 4XOC-3 , 12xDS3/E3 336DS1/VT1.5 252E1/VT2 Industry standard SPI-3 interface for Cells and packets transfer Industry standard SPI-4.2 interface for Cells and packets transfer TIGRIS S4811 NP3700 EVROS S1208 S1212 1xOC12 or 4xOC3 S1212 1xOC12 or 4xOC3 |
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