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STLC3085 数据表(PDF) 16 Page - STMicroelectronics |
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STLC3085 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 28 page ![]() Functional description STLC3085 16/28 3.2.5 Layout recommendation A properly designed PCB layout is a basic issue to guarantee a correct behaviour and good noise performances. Particular care must be taken on the ground connection and in this case the star configuration allows surely to avoid possible problems (see Application Diagram Figure 7 and Figure 8). The ground of the power supply (VPOS) has to be connected to the center of the star, let’s call this point SYSTEM-GND. This point should show a resistance as low as possible, that means it should be a ground plane. In particular to avoid noise problems the layout should prevent any coupling between the DC/ DC converter components and analog pins that are referred to AGND (ex: RD, IREF, RTH, RLIM, VF). As a first reccomendation the components CV, L, T1, D1, CVPOS, RSENSE should be kept as close as possible to each other and isolated from the other components. Additional improvements can be obtained: ● decoupling the center of the star from the analog ground of STLC3085 using small chokes. ● adding a capacitor in the range of 100nF between VPOS and AGND in order to filter the switch frequency on VPOS. 3.2.6 External components list In order to properly define the external components value the following system parameters have to be defined: ● The AC input impedance shown by the SLIC at the line terminals "Zs" to which the return loss measurement is referred. It can be real (typ. 600 Ω) or complex. ● The AC balance impedance, it is the equivalent impedance of the line "Zl" used for evaluation of the trans-hybrid loss performances (2/4 wire conversion). It is usually a complex impedance. ● The value of the two protection resistors Rp in series with the line termination. ● The slope of the ringing waveform " ∆V TR/∆T ". ● The value of the constant current limit current "Ilim". ● The value of the off-hook current threshold "ITH". ● The value of the ring trip rectified average threshold current "IRTH". ● The value of the required self generated negative battery "VBATR" in ring mode (max value is 64V). This value can be obtained from the desired ring peak level + 5V. ● The value of the maximum current peak drawn from Vpos "IPK". Table 10. External Components Name Function Formula Typ. Value BUCKBOOST CONFIGURATION RREF Bias setting current RREF = 1.3/Ibias Ibias = 50 µA 26k Ω 1% CSVR Negative Battery Filter CSVR = 1/(2 π ⋅ fp ⋅ 1.8MΩ) fp = 50Hz 1.5nF 10% 100V |
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