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ICS650-21 数据表(PDF) 3 Page - Renesas Technology Corp |
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ICS650-21 数据表(HTML) 3 Page - Renesas Technology Corp |
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3 / 9 page ![]() ICS650-21 SYSTEM PERIPHERAL CLOCK SOURCE CLOCK SYNTHESIZER IDT™ / ICS™ SYSTEM PERIPHERAL CLOCK SOURCE 3 ICS650-21 REV J 051310 External Components The ICS650-21 requires a minimum number of external components for proper operation. Decoupling Capacitor Decoupling capacitors of 0.01µF must be connected between each VDD and GND (pins 4 and 6, pins 16 and 14), as close to the device as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB trace between the clock outputs and the loads are over 1 inch, series termination should be used. To series terminate a 50 Ω trace (a commonly used trace impedance) place a 33 Ωresistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20 Ω. Crystal Information The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used. 13 OFF/14.318M Output 14.31818 MHz clock output only when ASEL = VDD. 14 GND Power Connect to ground. 15 ASEL Input ACLK select pin. Determines frequency of audio clock per table above. 16 VDD Power Connect to VDD. Must be same value as other VDD. Decouple with pin 14. 17 PCLK3 Output PCLK output number 3 per table above. 18 PCLK2 Output PCLK output number 2 per table above. 19 PSEL0 Input Processor select pin #0. Determines frequencies on PCLKs 1-3 per table above. 20 PSEL1 Input Processor select pin #1. Determines frequencies on PCLKs 1-3 per table above. Pin Number Pin Name Pin Type Pin Description |
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